[coreboot-gerrit] New patch to review for coreboot: intel/skylake: Add USB2 port config for max settings

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12203

-gerrit

commit d93dddee255fe249f422bbe62116b3128ecd8dd0
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Oct 26 15:27:29 2015 -0700

    intel/skylake: Add USB2 port config for max settings
    
    Add a new USB2_PORT_MAX with the max possible settings
    (56mV) for the TX and Pre-emphasis bias values.  Also fix
    the settings for the detachable tablet config to match the
    skylake HSIO tuning guide as it was incorrect before.
    
    BUG=chrome-os-partner:45367
    BRANCH=none
    TEST=build and boot on glados
    
    Change-Id: Id9ccc683fe92c962095347e0d1a0afeb082c821f
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: e5d56831e75f98a3c75ed333e4b79b1a37f14792
    Original-Change-Id: Ia2e3e93236f1463201f83a1cae28349de2836110
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/308729
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/skylake/include/soc/usb.h | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h
index 29b603a..ee1e488 100644
--- a/src/soc/intel/skylake/include/soc/usb.h
+++ b/src/soc/intel/skylake/include/soc/usb.h
@@ -65,6 +65,15 @@ struct usb2_port_config {
  * - Internal device down
  */
 
+/* Max TX and Pre-emp settings */
+#define USB2_PORT_MAX { \
+	.enable        = 1, \
+	.tx_bias       = USB2_BIAS_56MV, \
+	.tx_emp_enable = USB2_PRE_EMP_ON, \
+	.pre_emp_bias  = USB2_BIAS_56MV, \
+	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
+}
+
 /* 11.5"-12" */
 #define USB2_PORT_LONG { \
 	.enable        = 1, \
@@ -140,10 +149,10 @@ struct usb2_port_config {
 /* 2:1 Detachable, 2"-4" on tablet + 2"-4" on base */
 #define USB2_PORT_DETACHABLE_TABLET { \
 	.enable        = 1, \
-	.tx_bias       = USB2_BIAS_17MV, \
-	.tx_emp_enable = USB2_PRE_EMP_ON | USB2_DE_EMP_ON, \
-	.pre_emp_bias  = USB2_BIAS_45MV, \
-	.pre_emp_bit   = USB2_FULL_BIT_PRE_EMP, \
+	.tx_bias       = USB2_BIAS_56MV, \
+	.tx_emp_enable = USB2_PRE_EMP_ON, \
+	.pre_emp_bias  = USB2_BIAS_56MV, \
+	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
 }
 
 struct usb3_port_config {