[SeaBIOS] Bootsplash
Gert Menke
gert at menke.ac
Tue Mar 14 23:32:02 CET 2017
Hi,
I recently installed Coreboot and SeaBIOS on my Thinkpad X230.
After sorting out a little problem with suspend/resume, I am quite happy
with it.
Now I would like to add a bootsplash image, but SeaBIOS seems unable to
find any vesa modes.
However, HDT (http://www.hdt-project.org) shows several modes, including
the native display resolution (1366x768x32) and the resolution of my
bootsplash.bmp (1024x768x32).
I am using the proprietary vesa bios blob extracted from the original
X230 BIOS and it seems to work fine, except for the bootsplash.
Thanks for any help,
Gert
-------------- next part --------------
coreboot-4.5-1273-gb7fa7fbbd7 Tue Mar 14 16:53:20 UTC 2017 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
Back from sandybridge_early_initialization()
SMBus controller enabled.
CPU id(306a9): Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz
AES supported, TXT supported, VT supported
PCH type: QM77, device id: 1e55, rev id 4
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
Starting native Platform init
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: No valid MRC cache found.
Row addr bits : 15
Column addr bits : 10
Number of ranks : 2
DIMM Capacity : 4096 MB
CAS latencies : 5 6 7 8 9 10 11
tCKmin : 1.250 ns
tAAmin : 13.125 ns
tWRmin : 15.000 ns
tRCDmin : 13.125 ns
tRRDmin : 6.000 ns
tRPmin : 13.125 ns
tRASmin : 35.000 ns
tRCmin : 48.125 ns
tRFCmin : 160.000 ns
tWTRmin : 7.500 ns
tRTPmin : 7.500 ns
tFAWmin : 30.000 ns
channel[0] rankmap = 0x3
Row addr bits : 15
Column addr bits : 10
Number of ranks : 2
DIMM Capacity : 4096 MB
CAS latencies : 5 6 7 8 9 10 11
tCKmin : 1.250 ns
tAAmin : 13.125 ns
tWRmin : 15.000 ns
tRCDmin : 13.125 ns
tRRDmin : 6.000 ns
tRPmin : 13.125 ns
tRASmin : 35.000 ns
tRCmin : 48.125 ns
tRFCmin : 160.000 ns
tWTRmin : 7.500 ns
tRTPmin : 7.500 ns
tFAWmin : 30.000 ns
channel[1] rankmap = 0x3
Starting RAM training (0).
PLL busy... done in 10 us
MCU frequency is set at : 800 MHz
Selected DRAM frequency: 800 MHz
Minimum CAS latency : 11T
Selected CAS latency : 11T
Selected CWL latency : 8T
Selected tRCD : 11T
Selected tRP : 11T
Selected tRAS : 28T
Selected tWR : 12T
Selected tFAW : 24T
Selected tRRD : 5T
Selected tRTP : 6T
Selected tWTR : 6T
Selected tRFC : 128T
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 2
PCI(0, 0, 0)[bc] = c2a00000
PCI(0, 0, 0)[a8] = 3b600000
PCI(0, 0, 0)[ac] = 2
PCI(0, 0, 0)[b8] = c0000000
PCI(0, 0, 0)[b0] = c0a00000
PCI(0, 0, 0)[b4] = c0800000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = fe000000
PCI(0, 0, 0)[74] = 1
PCI(0, 0, 0)[78] = fe000c00
Done memory map
Done io registers
Done jedec reset
Done MRS commands
t123: 1767, 6000, 7620
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware In
*** Log truncated, 2307 characters dropped. ***
Relocate MRC DATA from fefff9fc to bff7c000 (1440 bytes)
CBMEM entry for DIMM info: 0xbfffe960
MTRR Range: Start=ff000000 End=0 (Size 1000000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=bf800000 End=c0000000 (Size 800000)
MTRR Range: Start=c0000000 End=c0800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2ff00 size 12dcb
Decompressing stage fallback/ramstage @ 0xbff3dfc0 (231760 bytes)
Loading module at bff3e000 with entry bff3e000. filesize: 0x27978 memsize: 0x38910
Processing 2599 relocs. Offset value of 0xbfe3e000
coreboot-4.5-1273-gb7fa7fbbd7 Tue Mar 14 16:53:20 UTC 2017 ramstage starting...
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0154] ops
PCI: 00:00.0 [8086/0154] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0151] disabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1e3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1e3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1e3d] disabled No operations
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedcb210
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: Static device PCI: 00:1f.6 not found, disabling it.
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1180/0000] ops
PCI: 01:00.0 [1180/e823] enabled
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.0 took 227 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [8086/0000] ops
PCI: 02:00.0 [8086/08b1] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0x40
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
scan_bus: scanning of bus PCI: 00:1c.1 took 218 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
PCI: pci_scan_bus for bus 03
scan_bus: scanning of bus PCI: 00:1c.2 took 45 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
PNP: 00ff.1 enabled
PNP: 0c31.0 enabled
recv_ec_data: 0x47
recv_ec_data: 0x32
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x35
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
recv_ec_data: 0x40
recv_ec_data: 0x11
EC Firmware ID G2HT35WW-3.22, Version 4.01B
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0x00
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0x40
recv_ec_data: 0x90
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0x60
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0x70
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0x00
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0xa6
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
recv_ec_data: 0xa6
recv_ec_data: 0x70
PNP: 00ff.2 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 4684 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 18 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 5547 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 5553 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 5650 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 0c31.0 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.2Unknown device path type: 0
child on link 0
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
Unknown device path type: 0
Unknown device path type: 0
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
Unknown device path type: 0
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
Unknown device path type: 0
resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
PNP: 0c31.0
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
Unknown device path type: 0
18 * [0x0 - 0xfff] io
PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 1c * [0x0 - 0xfff] io
PCI: 00:02.0 20 * [0x1000 - 0x103f] io
PCI: 00:19.0 18 * [0x1040 - 0x105f] io
PCI: 00:1f.2 20 * [0x1060 - 0x107f] io
PCI: 00:1f.2 10 * [0x1080 - 0x1087] io
PCI: 00:1f.2 18 * [0x1088 - 0x108f] io
PCI: 00:1f.2 14 * [0x1090 - 0x1093] io
PCI: 00:1f.2 1c * [0x1094 - 0x1097] io
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] mem
PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0x1fff] mem
PCI: 00:1c.1 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
Unknown device path type: 0
14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
Unknown device path type: 0
10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem
PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem
PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem
PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem
PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem
PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem
PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem
PCI: 00:04.0 10 * [0x11630000 - 0x11637fff] mem
PCI: 00:1b.0 10 * [0x11638000 - 0x1163bfff] mem
PCI: 00:19.0 14 * [0x1163c000 - 0x1163cfff] mem
PCI: 00:1f.2 24 * [0x1163d000 - 0x1163d7ff] mem
PCI: 00:1a.0 10 * [0x1163e000 - 0x1163e3ff] mem
PCI: 00:1d.0 10 * [0x1163f000 - 0x1163f3ff] mem
PCI: 00:1f.3 10 * [0x11640000 - 0x116400ff] mem
PCI: 00:16.0 10 * [0x11641000 - 0x1164100f] mem
DOMAIN: 0000 mem: base: 11641010 size: 11641010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
skipping PNP: 00ff.2 at 60 fixed resource, size=0!
skipping PNP: 00ff.2 at 62 fixed resource, size=0!
skipping PNP: 00ff.2 at 64 fixed resource, size=0!
skipping PNP: 00ff.2 at 66 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
PCI: 00:02.0 20 * [0x3000 - 0x303f] io
PCI: 00:19.0 18 * [0x3040 - 0x305f] io
PCI: 00:1f.2 20 * [0x3060 - 0x307f] io
PCI: 00:1f.2 10 * [0x3080 - 0x3087] io
PCI: 00:1f.2 18 * [0x3088 - 0x308f] io
PCI: 00:1f.2 14 * [0x3090 - 0x3093] io
PCI: 00:1f.2 1c * [0x3094 - 0x3097] io
DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff
Unknown device path type: 0
18 * [0x2000 - 0x2fff] io
PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:11641010 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem
PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem
PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem
PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem
PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem
PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem
PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem
PCI: 00:04.0 10 * [0xf1630000 - 0xf1637fff] mem
PCI: 00:1b.0 10 * [0xf1638000 - 0xf163bfff] mem
PCI: 00:19.0 14 * [0xf163c000 - 0xf163cfff] mem
PCI: 00:1f.2 24 * [0xf163d000 - 0xf163d7ff] mem
PCI: 00:1a.0 10 * [0xf163e000 - 0xf163e3ff] mem
PCI: 00:1d.0 10 * [0xf163f000 - 0xf163f3ff] mem
PCI: 00:1f.3 10 * [0xf1640000 - 0xf16400ff] mem
PCI: 00:16.0 10 * [0xf1641000 - 0xf164100f] mem
DOMAIN: 0000 mem: next_base: f1641010 size: 11641010 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff
PCI: 01:00.0 10 * [0xf1400000 - 0xf14000ff] mem
PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff
PCI: 02:00.0 10 * [0xf1500000 - 0xf1501fff] mem
PCI: 00:1c.1 mem: next_base: f1502000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff
Unknown device path type: 0
14 * [0xf0000000 - 0xf07fffff] prefmem
PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff
Unknown device path type: 0
10 * [0xf0800000 - 0xf0ffffff] mem
PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x23b600000 TOLUD 0xc2a00000 TOM 0x200000000
MEBASE 0x1fe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xc0000000 size 8M
Available memory below 4GB: 3072M
Available memory above 4GB: 5046M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f1630000 - 0x00f1637fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x00f1641000 - 0x00f164100f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00f163c000 - 0x00f163cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f1638000 - 0x00f163bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f1501fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
Unknown device path type: 0
missing set_resources
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 13b600000 align 0 gran 0 limit 0 flags e0004200 index 5
DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10
PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base f1630000 size 8000 align 15 gran 15 limit f1637fff flags 60000201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base f1641000 size 10 align 12 gran 4 limit f164100f flags 60000201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10
PCI: 00:19.0 resource base f163c000 size 1000 align 12 gran 12 limit f163cfff flags 60000200 index 14
PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base f163e000 size 400 align 12 gran 10 limit f163e3ff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base f1638000 size 4000 align 14 gran 14 limit f163bfff flags 60000201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base f1500000 size 2000 align 13 gran 13 limit f1501fff flags 60000201 index 10
PCI: 00:1c.2Unknown device path type: 0
child on link 0
PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24
PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20
Unknown device path type: 0
Unknown device path type: 0
resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10
Unknown device path type: 0
resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14
Unknown device path type: 0
resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
PCI: 00:1c.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.0 resource base f163f000 size 400 align 12 gran 10 limit f163f3ff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
PNP: 0c31.0
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
PCI: 00:1f.2 resource base f163d000 size 800 align 12 gran 11 limit f163d7ff flags 60000200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base f1640000 size 100 align 12 gran 8 limit f16400ff flags 60000201 index 10
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2055 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21fa
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21fa
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 17aa/21fa
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 17aa/21fa
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21fa
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21fa
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/21fa
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/21fa
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 17aa/21fa
PCI: 00:1c.2 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/21fa
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/21fa
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21fa
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21fa
PCI: 00:1f.3 cmd <- 103
PCI: 01:00.0 subsystem <- 17aa/21fa
PCI: 01:00.0 cmd <- 06
PCI: 02:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 126 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
Adjusting 00038002: 0x00000024 -> 0x00038024
Adjusting 0003801d: 0x0000003c -> 0x0003803c
Adjusting 00038026: 0x00000024 -> 0x00038024
Adjusting 00038054: 0x000000d8 -> 0x000380d8
Adjusting 00038066: 0x00000160 -> 0x00038160
Adjusting 0003806d: 0x000000c0 -> 0x000380c0
Adjusting 00038075: 0x000000c4 -> 0x000380c4
Adjusting 0003807e: 0x000000d0 -> 0x000380d0
Adjusting 00038085: 0x000000cc -> 0x000380cc
Adjusting 0003808b: 0x000000c8 -> 0x000380c8
SMM Module: stub loaded at 00038000. Will call bff53613(bff72880)
Installing SMM handler to 0xc0000000
Loading module at c0010000 with entry c0010569. filesize: 0x1898 memsize: 0x58b8
Processing 76 relocs. Offset value of 0xc0010000
Adjusting c0010036: 0x0000177c -> 0xc001177c
Adjusting c0010055: 0x0000177c -> 0xc001177c
Adjusting c0010108: 0x0000177c -> 0xc001177c
Adjusting c0010198: 0x0000178c -> 0xc001178c
Adjusting c00104b8: 0x00001898 -> 0xc0011898
Adjusting c00104d2: 0x000018a0 -> 0xc00118a0
Adjusting c00104e9: 0x000018a0 -> 0xc00118a0
Adjusting c0010536: 0x00001890 -> 0xc0011890
Adjusting c001054c: 0x000017e0 -> 0xc00117e0
Adjusting c0010572: 0x00001898 -> 0xc0011898
Adjusting c0010580: 0x00001898 -> 0xc0011898
Adjusting c001058d: 0x00001880 -> 0xc0011880
Adjusting c0010598: 0x00001880 -> 0xc0011880
Adjusting c00105ac: 0x00001884 -> 0xc0011884
Adjusting c00105b2: 0x0000189c -> 0xc001189c
Adjusting c00105ba: 0x00001884 -> 0xc0011884
Adjusting c00105d7: 0x0000189c -> 0xc001189c
Adjusting c00105e0: 0x00001880 -> 0xc0011880
Adjusting c00106cc: 0x000017ac -> 0xc00117ac
Adjusting c00107e6: 0x0000188c -> 0xc001188c
Adjusting c001080f: 0x0000188c -> 0xc001188c
Adjusting c0010832: 0x0000188c -> 0xc001188c
Adjusting c001085b: 0x00001888 -> 0xc0011888
Adjusting c0010879: 0x0000188c -> 0xc001188c
Adjusting c001089f: 0x00001888 -> 0xc0011888
Adjusting c001095b: 0x0000188c -> 0xc001188c
Adjusting c0010960: 0x00001888 -> 0xc0011888
Adjusting c0010970: 0x00001768 -> 0xc0011768
Adjusting c0010cc0: 0x000018a4 -> 0xc00118a4
Adjusting c0010cef: 0x000018a8 -> 0xc00118a8
Adjusting c0010d02: 0x000018a4 -> 0xc00118a4
Adjusting c0010d25: 0x000018a8 -> 0xc00118a8
Adjusting c0010de8: 0x000018a4 -> 0xc00118a4
Adjusting c0011020: 0x000018a8 -> 0xc00118a8
Adjusting c0011227: 0x000018a8 -> 0xc00118a8
Adjusting c0011306: 0x00001890 -> 0xc0011890
Adjusting c0011316: 0x00001890 -> 0xc0011890
Adjusting c001132b: 0x00001890 -> 0xc0011890
Adjusting c001134c: 0x00001890 -> 0xc0011890
Adjusting c0011375: 0x00001890 -> 0xc0011890
Adjusting c0011392: 0x00001890 -> 0xc0011890
Adjusting c00113a5: 0x000018b4 -> 0xc00118b4
Adjusting c00113e9: 0x000018ac -> 0xc00118ac
Adjusting c0011406: 0x000018ac -> 0xc00118ac
Adjusting c0011424: 0x000018b4 -> 0xc00118b4
Adjusting c001142a: 0x000018b0 -> 0xc00118b0
Adjusting c0011437: 0x00001890 -> 0xc0011890
Adjusting c001148d: 0x000018b0 -> 0xc00118b0
Adjusting c00114e2: 0x000017bc -> 0xc00117bc
Adjusting c00114ff: 0x00001890 -> 0xc0011890
Adjusting c001151e: 0x000017d0 -> 0xc00117d0
Adjusting c0011523: 0x000018b0 -> 0xc00118b0
Adjusting c00115e8: 0x00001890 -> 0xc0011890
Adjusting c0011616: 0x00001890 -> 0xc0011890
Adjusting c0011643: 0x00001890 -> 0xc0011890
Adjusting c0011669: 0x00001890 -> 0xc0011890
Adjusting c001168d: 0x00001890 -> 0xc0011890
Adjusting c0011721: 0x000018b0 -> 0xc00118b0
Adjusting c0011735: 0x00001890 -> 0xc0011890
Adjusting c0011760: 0x00001748 -> 0xc0011748
Adjusting c0011768: 0x00000021 -> 0xc0010021
Adjusting c001176c: 0x00001748 -> 0xc0011748
Adjusting c0011774: 0x00000092 -> 0xc0010092
Adjusting c0011780: 0x00001798 -> 0xc0011798
Adjusting c0011798: 0x000002d0 -> 0xc00102d0
Adjusting c001179c: 0x000002dc -> 0xc00102dc
Adjusting c00117a0: 0x000002df -> 0xc00102df
Adjusting c00117f0: 0x000014ca -> 0xc00114ca
Adjusting c00117f4: 0x0000135c -> 0xc001135c
Adjusting c0011800: 0x00001640 -> 0xc0011640
Adjusting c0011804: 0x00001303 -> 0xc0011303
Adjusting c0011808: 0x00001324 -> 0xc0011324
Adjusting c001180c: 0x0000131f -> 0xc001131f
Adjusting c0011814: 0x00001434 -> 0xc0011434
Adjusting c0011818: 0x00001313 -> 0xc0011313
Adjusting c0011834: 0x00001478 -> 0xc0011478
Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0xc0008000
Adjusting c0008002: 0x00000024 -> 0xc0008024
Adjusting c000801d: 0x0000003c -> 0xc000803c
Adjusting c0008026: 0x00000024 -> 0xc0008024
Adjusting c0008054: 0x000000d8 -> 0xc00080d8
Adjusting c0008066: 0x00000160 -> 0xc0008160
Adjusting c000806d: 0x000000c0 -> 0xc00080c0
Adjusting c0008075: 0x000000c4 -> 0xc00080c4
Adjusting c000807e: 0x000000d0 -> 0xc00080d0
Adjusting c0008085: 0x000000cc -> 0xc00080cc
Adjusting c000808b: 0x000000c8 -> 0xc00080c8
SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd
SMM Module: placing jmp sequence at c0007800 rel16 0x07fd
SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd
SMM Module: stub loaded at c0008000. Will call c0010569(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500
SMI_STS: MCSMI
PM1_STS:
GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 EL_SCI/BATLOW
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0
TCO_STS:
... raise SMI#
In relocation handler: cpu 0
New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13180 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x000000023b600000 size 0x13b600000 type 6
MTRR addr 0x0-0x10 set to 6 type @ 0
MTRR addr 0x10-0x20 set to 6 type @ 1
MTRR addr 0x20-0x30 set to 6 type @ 2
MTRR addr 0x30-0x40 set to 6 type @ 3
MTRR addr 0x40-0x50 set to 6 type @ 4
MTRR addr 0x50-0x60 set to 6 type @ 5
MTRR addr 0x60-0x70 set to 6 type @ 6
MTRR addr 0x70-0x80 set to 6 type @ 7
MTRR addr 0x80-0x84 set to 6 type @ 8
MTRR addr 0x84-0x88 set to 6 type @ 9
MTRR addr 0x88-0x8c set to 6 type @ 10
MTRR addr 0x8c-0x90 set to 6 type @ 11
MTRR addr 0x90-0x94 set to 6 type @ 12
MTRR addr 0x94-0x98 set to 6 type @ 13
MTRR addr 0x98-0x9c set to 6 type @ 14
MTRR addr 0x9c-0xa0 set to 6 type @ 15
MTRR addr 0xa0-0xa4 set to 0 type @ 16
MTRR addr 0xa4-0xa8 set to 0 type @ 17
MTRR addr 0xa8-0xac set to 0 type @ 18
MTRR addr 0xac-0xb0 set to 0 type @ 19
MTRR addr 0xb0-0xb4 set to 0 type @ 20
MTRR addr 0xb4-0xb8 set to 0 type @ 21
MTRR addr 0xb8-0xbc set to 0 type @ 22
MTRR addr 0xbc-0xc0 set to 0 type @ 23
MTRR addr 0xc0-0xc1 set to 6 type @ 24
MTRR addr 0xc1-0xc2 set to 6 type @ 25
MTRR addr 0xc2-0xc3 set to 6 type @ 26
MTRR addr 0xc3-0xc4 set to 6 type @ 27
MTRR addr 0xc4-0xc5 set to 6 type @ 28
MTRR addr 0xc5-0xc6 set to 6 type @ 29
MTRR addr 0xc6-0xc7 set to 6 type @ 30
MTRR addr 0xc7-0xc8 set to 6 type @ 31
MTRR addr 0xc8-0xc9 set to 6 type @ 32
MTRR addr 0xc9-0xca set to 6 type @ 33
MTRR addr 0xca-0xcb set to 6 type @ 34
MTRR addr 0xcb-0xcc set to 6 type @ 35
MTRR addr 0xcc-0xcd set to 6 type @ 36
MTRR addr 0xcd-0xce set to 6 type @ 37
MTRR addr 0xce-0xcf set to 6 type @ 38
MTRR addr 0xcf-0xd0 set to 6 type @ 39
MTRR addr 0xd0-0xd1 set to 6 type @ 40
MTRR addr 0xd1-0xd2 set to 6 type @ 41
MTRR addr 0xd2-0xd3 set to 6 type @ 42
MTRR addr 0xd3-0xd4 set to 6 type @ 43
MTRR addr 0xd4-0xd5 set to 6 type @ 44
MTRR addr 0xd5-0xd6 set to 6 type @ 45
MTRR addr 0xd6-0xd7 set to 6 type @ 46
MTRR addr 0xd7-0xd8 set to 6 type @ 47
MTRR addr 0xd8-0xd9 set to 6 type @ 48
MTRR addr 0xd9-0xda set to 6 type @ 49
MTRR addr 0xda-0xdb set to 6 type @ 50
MTRR addr 0xdb-0xdc set to 6 type @ 51
MTRR addr 0xdc-0xdd set to 6 type @ 52
MTRR addr 0xdd-0xde set to 6 type @ 53
MTRR addr 0xde-0xdf set to 6 type @ 54
MTRR addr 0xdf-0xe0 set to 6 type @ 55
MTRR addr 0xe0-0xe1 set to 6 type @ 56
MTRR addr 0xe1-0xe2 set to 6 type @ 57
MTRR addr 0xe2-0xe3 set to 6 type @ 58
MTRR addr 0xe3-0xe4 set to 6 type @ 59
MTRR addr 0xe4-0xe5 set to 6 type @ 60
MTRR addr 0xe5-0xe6 set to 6 type @ 61
MTRR addr 0xe6-0xe7 set to 6 type @ 62
MTRR addr 0xe7-0xe8 set to 6 type @ 63
MTRR addr 0xe8-0xe9 set to 6 type @ 64
MTRR addr 0xe9-0xea set to 6 type @ 65
MTRR addr 0xea-0xeb set to 6 type @ 66
MTRR addr 0xeb-0xec set to 6 type @ 67
MTRR addr 0xec-0xed set to 6 type @ 68
MTRR addr 0xed-0xee set to 6 type @ 69
MTRR addr 0xee-0xef set to 6 type @ 70
MTRR addr 0xef-0xf0 set to 6 type @ 71
MTRR addr 0xf0-0xf1 set to 6 type @ 72
MTRR addr 0xf1-0xf2 set to 6 type @ 73
MTRR addr 0xf2-0xf3 set to 6 type @ 74
MTRR addr 0xf3-0xf4 set to 6 type @ 75
MTRR addr 0xf4-0xf5 set to 6 type @ 76
MTRR addr 0xf5-0xf6 set to 6 type @ 77
MTRR addr 0xf6-0xf7 set to 6 type @ 78
MTRR addr 0xf7-0xf8 set to 6 type @ 79
MTRR addr 0xf8-0xf9 set to 6 type @ 80
MTRR addr 0xf9-0xfa set to 6 type @ 81
MTRR addr 0xfa-0xfb set to 6 type @ 82
MTRR addr 0xfb-0xfc set to 6 type @ 83
MTRR addr 0xfc-0xfd set to 6 type @ 84
MTRR addr 0xfd-0xfe set to 6 type @ 85
MTRR addr 0xfe-0xff set to 6 type @ 86
MTRR addr 0xff-0x100 set to 6 type @ 87
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 3/10.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base bff6c000, stack_end bff6cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: 0 has core 2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13180 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #1 initialized
CPU2: stack_base bff6b000, stack_end bff6bff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13180 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1b date=2014-05-29
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x02 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #2 initialized
CPU3: stack_base bff6a000, stack_end bff6aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13180 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x03 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #3 initialized
All AP CPUs stopped (362 loops)
CPU0: stack: bff6d000 - bff6e000, lowest used address bff6dab0, stack used: 1360 bytes
CPU1: stack: bff6c000 - bff6d000, lowest used address bff6cc94, stack used: 876 bytes
CPU2: stack: bff6b000 - bff6c000, lowest used address bff6bc94, stack used: 876 bytes
CPU3: stack: bff6a000 - bff6b000, lowest used address bff6ac94, stack used: 876 bytes
CPU_CLUSTER: 0 init finished in 76421 usecs
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling PEG60.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 1012 usecs
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT2 25W-35W Power Meter Weights
GT Power Management Init (post VBIOS)
PCI: 00:02.0 init finished in 339 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 1 usecs
PCI: 00:14.0 init ...
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 6 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode : Normal
ME: Error Code : No Error
ME: Progress Phase : uKernel Phase
ME: Power Management Event : Global reset after an error
ME: Progress Phase State : Unknown 0x00
ME: BIOS path: Normal
ME: Extend SHA-256: 72ac4092d50568edb998066d81033da5f626bf97fe7f9942d06247dbf59bf8db
ME: MBP item header 00020103
ME: MBP item header 00050102
ME: MBP item header 00020501
ME: MBP item header 00020201
ME: MBP item header 02030101
ME: MBP item header 02060301
ME: MBP item header 02090401
ME: MBP item header 02020601
ME: mbp read OK after 319554 cycles
ME: found version 8.0.12.1498
ME Capability: Full Network manageability : enabled
ME Capability: Regular Network manageability : disabled
ME Capability: Manageability : enabled
ME Capability: Small business technology : disabled
ME Capability: Level III manageability : disabled
ME Capability: IntelR Anti-Theft (AT) : enabled
ME Capability: IntelR Capability Licensing Service (CLS) : enabled
ME Capability: IntelR Power Sharing Technology (MPC) : enabled
ME Capability: ICC Over Clocking : enabled
ME Capability: Protected Audio Video Path (PAVP) : enabled
ME Capability: IPV6 : enabled
ME Capability: KVM Remote Control (KVM) : enabled
ME Capability: Outbreak Containment Heuristic (OCH) : disabled
ME Capability: Virtual LAN (VLAN) : enabled
ME Capability: TLS : enabled
ME Capability: Wireless LAN (WLAN) : enabled
PCI: 00:16.0 init finished in 204629 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 12 usecs
PCI: 00:1b.0 init ...
Azalia: base = f1638000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 76
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 5971 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 11 usecs
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 10 usecs
PCI: 00:1c.2 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 14 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 12 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00170020
reg 0x0002: 0x00170020
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
Set power off after power failure.
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
NMI sources enabled.
PantherPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 765 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
SATA: Controller in AHCI mode.
ABAR: f163d000
PCI: 00:1f.2 init finished in 286 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 15 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 1 usecs
PNP: 00ff.2 init ...
Keyboard init...
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard reset failed ACK: 0xaa
PNP: 00ff.2 init finished in 900145 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 28821 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:04.0: enabled 1
PCI: 02:00.0: enabled 1
Unknown device path type: 0
: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
BS: BS_DEV_INIT times (us): entry 8 run 1218517 exit 0
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Updating MRC cache data.
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: No valid MRC cache found.
flash size 0xc00000 bytes
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000
Need to erase the MRC cache region of 65536 bytes at ffa20000
SF: Successfully erased 65536 bytes @ 0x620000
Finally: write MRC cache update to flash at ffa20000
SF: Successfully written 1456 bytes @ 0x620000
Successfully wrote MRC cache
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 199c0 size 345c
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfed8000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * IGD OpRegion
GET_VBIOS: 84b9 37af 74 5d 16
VBIOS not found.
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at bfec5000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = bfedcff0
ACPI: * DMAR
ACPI: added table 6/32, length now 60
current = bfedd0a0
ACPI: * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 20704 bytes.
smbios_write_tables: bfec4000
recv_ec_data: 0x47
recv_ec_data: 0x32
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x35
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
Create SMBIOS type 17
Root Device (LENOVO ThinkPad X230)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 01:00.0 (unknown)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 0c31.0 (unknown)
PNP: 00ff.2 (Lenovo H8 EC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:04.0 (unknown)
PCI: 02:00.0 (unknown)
Unknown device path type: 0
(unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 643 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7fee
Writing coreboot table at 0xbfefc000
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 191c0 size 7a0
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-00000000bfec3fff: RAM
4. 00000000bfec4000-00000000bfffffff: CONFIGURATION TABLES
5. 00000000c0000000-00000000c29fffff: RESERVED
6. 00000000f8000000-00000000fbffffff: RESERVED
7. 00000000fed90000-00000000fed91fff: RESERVED
8. 0000000100000000-000000023b5fffff: RAM
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
FMAP: Found "FLASH" version 1.1 at 600000.
FMAP: base = ff400000 size = c00000 #areas = 3
Wrote coreboot table at: bfefc000, 0xb04 bytes, checksum 438b
coreboot table: 2844 bytes.
IMD ROOT 0. bffff000 00001000
IMD SMALL 1. bfffe000 00001000
CONSOLE 2. bff7e000 00080000
TIME STAMP 3. bff7d000 00000400
MRC DATA 4. bff7c000 000005b0
ROMSTG STCK 5. bff77000 00005000
RAMSTAGE 6. bff3d000 0003a000
57a9e100 7. bff04000 00038910
COREBOOT 8. bfefc000 00008000
ACPI 9. bfed8000 00024000
ACPI GNVS 10. bfed7000 00001000
4f444749 11. bfed5000 00002000
TCPA LOG 12. bfec5000 00010000
SMBIOS 13. bfec4000 00000800
IMD small region:
IMD ROOT 0. bfffec00 00000400
CAR GLOBALS 1. bfffeac0 00000140
MEM INFO 2. bfffe960 00000141
ROMSTAGE 3. bfffe940 00000004
57a9e000 4. bfffe920 00000010
BS: BS_WRITE_TABLES times (us): entry 704942 run 28523 exit 0
CBFS: 'Master Header Locator' located CBFS at [600100:bfffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 38e0c0 size f60e
Loading segment from ROM address 0xffd8e1f8
code (compression=1)
New segment dstaddr 0xe31e0 memsize 0x1ce20 srcaddr 0xffd8e230 filesize 0xf5d6
Loading segment from ROM address 0xffd8e214
Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
Loading Segment: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f5d6
lb: [0x00000000bff3e000, 0x00000000bff76910)
Post relocation: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f5d6
using LZMA
[ 0x000e31e0, 00100000, 0x00100000) <- ffd8e230
dest 000e31e0, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 32187 exit 0
PCH watchdog disabled
Jumping to boot code at 000ff06e(bfefc000)
CPU0: stack: bff6d000 - bff6e000, lowest used address bff6dab0, stack used: 1360 bytes
SeaBIOS (version rel-1.10.0-26-gc68aff5)
BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ bff7e000
Found mainboard LENOVO ThinkPad X230
Relocating init from 0x000e4720 to 0xbfe77dc0 (size 49568)
Found CBFS header at 0xffa00138
multiboot: eax=bff65180, ebx=bff65134
boot order:
1: /pci at i0cf8/*@1f,2/drive at 0/disk at 0
2: /rom at img/memtest
3:
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xbfec4000 to 0x000f08a0
Copying ACPI RSDP from 0xbfed8000 to 0x000f0870
Using pmtimer, ioport 0x508
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.0-26-gc68aff5)
Machine UUID [...]
XHCI init on dev 00:14.0: regs @ 0xf1620000, 8 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 4 ports (offset 1), def 3001
XHCI protocol USB 3.00, 4 ports (offset 5), def 1000
XHCI extcap 0xc1 @ 0xf1628040
XHCI extcap 0xc0 @ 0xf1628070
XHCI extcap 0x1 @ 0xf1628330
EHCI init on dev 00:1a.0 (regs=0xf163e020)
EHCI init on dev 00:1d.0 (regs=0xf163f020)
AHCI controller at 00:1f.2, iobase 0xf163d000, irq 10
Searching bootorder for: /pci at i0cf8/pci-bridge at 1c/*@0
Discarding ps2 data 0f (status=11)
Searching bootorder for: /pci at i0cf8/*@1f,2/drive at 0/disk at 0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: INTEL SSDSC2BW180A3L ATA-9 Hard-Disk (167 GiBytes)"
Mapping floppy floppyimg/hdt to addr 0xbfd05000
Searching bootorder for: /rom at floppyimg/hdt
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom at img/memtest
Searching bootorder for: /rom at img/tint
Searching bootorder for: /rom at img/nvramcui
Searching bootorder for: /rom at img/coreinfo
XHCI no devices found
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
WARNING - Timeout at ehci_wait_td:516!
ehci pipe=0xbfe6fe80 cur=bfd03e00 tok=80080d80 next=bfd03e40 td=0xbfd03e00 status=80080d80
ehci_wait_td error - status=80080148
Failure on hub port 5 disconnect
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms
Press ESC for boot menu.
Unable to find vesa video mode dimensions 1024/768
failed to find a videomode with 1024x768 24bpp (0=any).
WARNING - Timeout at tis_wait_sts:160!
Searching bootorder for: HALT
drive 0x000f0800: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=351651888
Space available for UMB: cf800-ee800, f0000-f07d0
Returned 188416 bytes of ZoneHigh
e820 map has 10 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bfd05000 = 1 RAM
4: 00000000bfd05000 - 00000000bfe6d000 = 2 RESERVED
5: 00000000bfe6d000 - 00000000bfeb2000 = 1 RAM
6: 00000000bfeb2000 - 00000000c2a00000 = 2 RESERVED
7: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
8: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
9: 0000000100000000 - 000000023b600000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
More information about the SeaBIOS
mailing list