[SeaBIOS] [PATCH] rtc_setup, NMI - Seabios boot loop

Kevin O'Connor kevin at koconnor.net
Tue Sep 1 23:48:52 CET 2015


On Tue, Sep 01, 2015 at 08:42:00PM +0000, Tim Shearer wrote:
[...]
> Anyway, rtc_setup() performs several CMOS register reads/writes. The
> function that triggers the reset is rtc_mask(). This is the only
> routine in the RTC code that doesn't explicitly disable non-maskable
> interrupts when writing to the CMOS index register. The patch below
> allows everything to boot as it should.

Thanks - that does look wrong.  I've queued a patch (see below).

[...]
> This email and attachments may contain privileged or confidential
> information intended only for the addressee(s) indicated. [...]

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-Kevin


commit 3156b71a535e6617fbc60fd6aef09a229aca7327
Author: Kevin O'Connor <kevin at koconnor.net>
Date:   Tue Sep 1 19:43:08 2015 -0400

    rtc: Disable NMI in rtc_mask()
    
    The rtc_mask() function should make sure the NMI disable bit is set
    (just as rtc_read() and rtc_write() do).
    
    Reported-by: Tim Shearer <tim.shearer at overturenetworks.com>
    Signed-off-by: Kevin O'Connor <kevin at koconnor.net>

diff --git a/src/hw/rtc.c b/src/hw/rtc.c
index 570a3ad..9649a5a 100644
--- a/src/hw/rtc.c
+++ b/src/hw/rtc.c
@@ -30,6 +30,7 @@ rtc_write(u8 index, u8 val)
 void
 rtc_mask(u8 index, u8 off, u8 on)
 {
+    index |= NMI_DISABLE_BIT;
     outb(index, PORT_CMOS_INDEX);
     u8 val = inb(PORT_CMOS_DATA);
     outb((val & ~off) | on, PORT_CMOS_DATA);



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