[SeaBIOS] [PATCH v2] Make pci memory window configurable.
kraxel at redhat.com
Tue May 3 12:34:42 CEST 2011
>> Is there any reason why there is a fixed split, other than making
>> the code simpler (i.e. need only one instead of two passes over all
>> pci devices)?
> I think the only reason is that a two pass PCI scan is more work than
> anyone wanted to do.
Are there any alignment requirements for the two pci memory windows,
other than the ones dictated by pci bars in there? To create mtrr
entries for the prefetchable memory maybe?
Is there a way to figure the usable address space at runtime instead of
depending on BUILD_PCIMEM_START? Can I just check RamSize?
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