[flashrom] BPv3.6 w flashrom

[Idwer Vollering]

Please "reply to all".

2012/12/5 Nabil <nabil.gergis at yahoo.com.au>:
> Sorry there's one thing I'm not sure I understand...
> Is it possible to adjust the locations of the wires of the soic clip so they match up with the correct pinouts?
> I just dont get how gnd (pin 10 of bus pirate) can be connected to the soic clip (only 8 cables which connect to pins 1-8)
> there's something I'm missing here i think, could you explain to me how to use an soic clip in detail, sorry for the trouble, much obliged. Nabs

Which soic8 clip do you have? I have a Pomona 5250; it is possible to
adjust the wire locations (pinouts) if you have the probe cable (that
fits on the open end of the wires - the other end is a box header that
connects to the buspirate):
http://dangerousprototypes.com/2011/08/03/new-bus-pirate-probe-cable/

>
> Idwer Vollering <vidwer at gmail.com> wrote:
>
>>2012/12/5 Nabs <ch12011-7 at yahoo.com.au>:
>>> Hi, sorry for the trouble. I'm running bus piratev3.6, bootloaderv4.4,
>>> firmwarev6.1 on flashrom-0.9.6.1, i plan to run the BP at 1M.
>>>
>>> When i run the command "flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -Vr
>>> oldbios.bin"
>>> I get:
>>> "
>>> Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI) on
>>> buspirate_spi.
>>> Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x0,
>>> id2 0x0
>>> Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI).
>>> ===
>>> This flash part has status NOT WORKING for operations: PROBE READ ERASE
>>> WRITE
>>> " etc...
>>>
>>>
>>> I think i have the wiring wrong which is why i get that error, i wonder if
>>> you could help me as its my first time?
>>> I'm trying to use In-circuit programming with a soldered bios chip using an
>>> 'SOIC 8 clip' and it has 8 wires. But the bus pirate has 10 pins.
>>>
>>> From another thread, these are the connections i need:
>>> Bus Pirate "MISO" (Pin 1) <----- SPI Device "DO" (Wire/Pin 2)
>>> Bus Pirate "CS" (Pin 2) -----> SPI Device "CS" (Wire/Pin 1)
>>> Bus Pirate "MOSI" (Pin 3) -----> SPI Device "DI" (Wire/Pin 5)
>>> Bus Pirate "CLK" (Pin 4) -----> SPI Device "CLK" (Wire/Pin 6)
>>> Bus Pirate "GND" (Pin 10) <----> SPI Device "GND" (Wire/Pin 4)
>>>
>>> It appears to me that GND is pin 10 and that the wires of the SOIC8 clip
>>> only contact pins 1-8, so how can this work?
>>>
>>> Also, could i just check the layout of the pins on the bus pirate if i'm
>>> reading it correctly on BPv3.6:
>>> 10  9
>>> 8    7
>>> 6    5
>>> 4    3
>>> 2    1
>>>
>>> Corresponding to:
>>> GND  3V3
>>> +5V    ADC
>>> VPU   AUX
>>> CLK    MOSI
>>> CS     MISO
>>
>>Forget the existence of +5V, VPU, ADC and AUX for now (
>>http://dangerousprototypes.com/docs/Bus_Pirate_I/O_Pin_Descriptions ),
>>connect the clip to the buspirate so that the clip passes the
>>buspirate pins like mentioned in this post:
>>http://www.coreboot.org/pipermail/flashrom/2012-November/010178.html
>>
>>This works for me, with a MX25L1605A soic8 chip:
>>
>>CS# (CS)                                          [1  chip  8]    VCC
>>(bridge with buspirate pin 3+7)
>>SO (MISO)                                        [2  chip  7]    HOLD# (+3V3)
>>WP# (bridge with buspirate pin 7+8)    [3  chip  6]    SCLK (CLK)
>>GND (GND)                                       [4  chip  5]    SI (MOSI)
>>
>>>
>>> Or are the pin numbers read in the opposite direction?
>>> ie
>>> 9  10
>>> 7  8
>>> 5  6
>>> 3  4
>>> 1  2
>>>
>>> Here's an image of my bus pirate if it helps:
>>> http://dangerousprototypes.com/wp-content/media/2012/11/Bus-Pirate-v3.6interface_01-W600.jpg
>>>
>>> Your help is much appreciated and i appreciate your patience, Nabs.
>>>
>>> _______________________________________________
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