[flashrom] SPI modes for FT4232 chip

Stany MARCEL stanypub at gmail.com
Sun Oct 17 10:48:00 CEST 2010


On Sat, Oct 16, 2010 at 2:20 PM, Stany MARCEL <stanypub at gmail.com> wrote:
> Hello,
>
> I want to use the FT4232 or FT2232 (with libfti) as a SPI master.
>
> Thanks to you I have a good example of SPI code with libftdi and this
> device since you added it to your supported flasher.
>
> I still don't know how to change some behavior of this component :
>
> - Clock mode
> Mode 0:  CPOL= 0  CPHA=0
> Mode 1:  CPOL= 0  CPHA=1
> Mode 2:  CPOL= 1  CPHA=0
> Mode 3:  CPOL= 1  CPHA=1
>
> - Data shift order, MSB or LSB First.
>
> If you have any information on theses subject, I'm very interested.
>
> Thanks in advance
>
>
> Extract from FTDI Documentation :
> For CPOL = 0, the base (inactive) level of SCLK is 0. In this mode:
>  * When CPHA = 0, data will be read in on the rising edge of SCLK, and
> data will be clocked out on the falling edge of SCLK.
>  * When CPHA = 1, data will be read in on the falling edge of SCLK,
> and data will clocked out on the rising edge of SCLK
> For CPOL =1, the base (inactive) level of SCLK is 1. In this mode:
>  * When CPHA = 0, data will be read in on the falling edge of SCLK,
> and data will clocked out on the rising edge of SCLK
>  * When CPHA =1, data will be read in on the rising edge of SCLK, and
> data will be clocked out on the falling edge of SCLK.
>

I found the needed informations in the SPI dll given by ftdi and the
ftdi.h from libftdi.h

#define SPI_CMD_WR_BYTES_MSB_RE /* 0001 0000 */ (MPSSE_DO_WRITE)
#define SPI_CMD_WR_BYTES_MSB_FE /* 0001 0001 */ (MPSSE_DO_WRITE|MPSSE_WRITE_NEG)
#define SPI_CMD_WR_BYTES_LSB_RE /* 0001 1000 */ (MPSSE_DO_WRITE|MPSSE_LSB)
#define SPI_CMD_WR_BYTES_LSB_FE /* 0001 1001 */
(MPSSE_DO_WRITE|MPSSE_LSB|MPSSE_WRITE_NEG)

#define SPI_CMD_RD_BYTES_MSB_RE /* 0010 0000 */ (MPSSE_DO_READ)
#define SPI_CMD_RD_BYTES_MSB_FE /* 0010 0101 */
(MPSSE_DO_READ|MPSSE_READ_NEG|MPSSE_WRITE_NEG)
#define SPI_CMD_RD_BYTES_LSB_RE /* 0010 1000 */ (MPSSE_DO_READ|MPSSE_LSB)
#define SPI_CMD_RD_BYTES_LSB_FE /* 0010 1101 */
(MPSSE_DO_READ|MPSSE_LSB|MPSSE_READ_NEG|MPSSE_WRITE_NEG)

I will test all theses modes with an oscilloscope to verify that it
works as expected.




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