[flashrom] Asus m2n-mx revision 1.06G
c-d.hailfinger.devel.2006 at gmx.net
Fri Feb 19 00:17:30 CET 2010
On 18.02.2010 23:44, flashrom at datastructuur.nl wrote:
> Probe and read of the w39v040c work indeed. Thanks Carl-Daniel!
Thank you for testing so quickly.
> For further testing I will use a pm49fl004 I had lying around.
> A probe and read were successful also.
Nice, as I had hoped.
> Erasing the chip failed however.
That's expected with the current source tree. We're in the process of
converting the chip unlock code to a new interface, and right now only a
very small number of chips has the necessary unlock functionality.
> flashrom v0.9.1-r906
> No coreboot table found.
> DMI string 0: "System manufacturer"
> DMI string 1: "System Product Name"
> DMI string 2: "System Version"
> DMI string 3: "ASUSTeK Computer INC."
> DMI string 4: "M2N-MX"
> DMI string 5: "Rev 1.xx"
> Found ITE SuperI/O, id 8712
> Found chipset "NVIDIA MCP61", enabling flash write... This chipset is not really supported yet. Guesswork...
> ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
> Guessed flash bus type is LPC
Yay. Our guess worked out just fine.
> Found SMBus device 10de:03eb at 00:01:1
> SPI BAR is at 0x00000000, after clearing low bits BAR is at 0x00000000
> MCP SPI is not used.
> This chipset supports the following protocols: LPC.
> Calibrating delay loop... 588M loops per second, 100 myus = 191 us. OK.
> Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x50
> Found chip "Winbond W39V040C" (512 KB, LPC) at physical address 0xfff80000.
I guess we can mark the MCP61 as partially supported now. The failing
erase is a chip issue, not a chipset issue, and will be addressed in due
"I do consider assignment statements and pointer variables to be among
computer science's most valuable treasures."
-- Donald E. Knuth
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