[coreboot] Porting coreboot to another Intel's bay-trail

[Jose Trujillo]

Zvika:
You are lucky If the model of your board appears in the list of supported nodels because you have to do not much, but, if not, you have to do a "motherboard porting" for your specific system.

Is essential you add the correct microcode and configure correctly FSP on memory settings otherwise the system will not boot.

Get focused into the "mainboard" tree in the folder where devicetree for your board is located.
The most notable files are:

devicetree.cb
gpio.h
Kconfig
Makefile.inc
and the ACPI folder.

Remember:
you also need to initialize EC or superio.
You need to select the right video framebuffer depending of the payload.
etc...

To edit devicetree.cb you need to understand the specific architecture of your board and you can enable/disable and add devices there (you can see examples from another boards).
To edit gpio.h you need to dump from ypur original "BIOS" the GPIO settings using inteltool (find more details in the text document I already sent you).
To edit Kconfig to enable features.
To edit Makefile.inc to enable code.
To edit ACPI files to provide hardware information to the OS and tell the processor what to do in case of a power event and other many things.

This is generally what you have to do to port to your board.
Maybe someone else can add something else or correct me if Iam wrong.

Good luck,
Jose Trujillo.

‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Saturday, September 29, 2018 9:46 AM, Zvi Vered <veredz72 at gmail.com> wrote:

> Hello,
>
> I created a new mainboard based on "Bayley Bay FSP-based CRB"
> It seems that (at least) the following files are mandatory for build:
>
> cmos.layout
> devicetree.cb
> romstage.c
>
> Am I right ?
> If yes - what info required to write those files ?
> Can I use coreboot default files instead ?
>
> Honestly - I thought that FSP binary configuration is all I have to do.
> And few changes in menuconfig (e.g ROM size).
>
> Thank you,
> Zvika
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