[coreboot] Problem with W83627DHG in Baytrail I (Possible IRQ conflict or overlapped SOC legacy COM1)

Jose Trujillo ce.autom at protonmail.com
Sat Jun 9 18:38:09 CEST 2018

Dear Rudolf/All,

Today I tried several things to try to make COM1 to work unsuccessfully.

In my last test today I crossed the COM configuration from:

COM1 (not working)        COM2 (OK)
0x3f8, IRQ4                      0x2f8, IRQ3


0x3f8, IRQ3                     0x2f8, IRQ4      (Both not working)

My conclusion (I coudl be wrong) on this is that both resources 0x3f8, IRQ4 (COM1) are being used by coreboot or FSP.

Anyone could give me a hint how to release those resources to be used by my LPC SIO chip. 

Thank you.
J. Trujillo

‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐

On June 6, 2018 11:46 PM, Rudolf Marek <r.marek at assembler.cz> wrote:

> Hi,
> In general I would check ELCR (I/O port register 0x4d0) to check if it is correctly programmed to EDGE/LEVEL (it should be edge)
> Also, how the Linux is supposed to detect the I/O port irq? I think you need some PNP device in ACPI to let linux infer the IRQ.
> I would also try to disable the IRQ from SoC, you just need to check how they are enabled (sorry not an expert here)
> and also I would use the legacy 0x3f8 instead.
> Thanks
> Rudolf

More information about the coreboot mailing list