[coreboot] About Paging, Realmode and what is going on

Zoran Stojsavljevic zoran.stojsavljevic at gmail.com
Tue Sep 5 05:52:26 CEST 2017


> Hint: on x86 it's essentially one billion instructions before you can
even think about using RAM, much less loading the payload.

This is why everybody using INTEL silicon do have FSP as A MUST (instead
SEC+PEI). And this is why CORE CPU creations (2C+) have > 500 million gates
per silicon. There gazillions of modes, which are probably only 10% used in
real scenarios. All others are testing modes. And INTEL made smart
investment forcing customers to pay for that (excessive silicon
use/overkill).

> which is to load linux from flash. It's working fine on UEFI today and
I'm seeing what it takes to replace the coreboot ramstage with linux.

YUP. Since no OS loader, only one/single OS instance to be actually loaded
from flash. Then you don't care about AHCI, SATA, IDE and other HDD/SSD
modes, also about GFX (embedded Linux) and also CSM or UEFI. No INT, no Run
Time Services. You are running true ram disk, unpacked from flash as well.

Zoran

On Tue, Sep 5, 2017 at 1:45 AM, ron minnich <rminnich at gmail.com> wrote:

>
>
> On Mon, Sep 4, 2017 at 3:41 PM Philipp Stanner <stanner at posteo.de> wrote:
>
>>
>> Start the board, load the OS and go back into your flash until reboot.
>>
>
> Just checking, but have you looked at the code to see what "start the
> board" really means? Hint: on x86 it's essentially one billion instructions
> before you can even think about using RAM, much less loading the payload.
>
> I'm guessing, by what you are saying, that you are not familiar with what
> has to be done. Apologies if I am wrong :-)
>
> And, that said, I'm back to the old original idea, which is to load linux
> from flash. It's working fine on UEFI today and I'm seeing what it takes to
> replace the coreboot ramstage with linux.
>
> ron
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://mail.coreboot.org/mailman/listinfo/coreboot
>
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