[coreboot] BayTrail PCIe problems (hangup) in FSP (in U-Boot)

[Zoran Stojsavljevic]

> I don't understand your note at all Zoran, but I am not alone it seems.

I am not one who is asking for help here. It is U-Boot creators, not
knowing how to solve (particular) INTEL mess. But if you all agree with
this, I have not at all problem with this mess. You asked for it, didn't
you, all???

And... You all do the particular solutions. Today reverse engineering,
tomorrow some partial SW from who-ever-supplies-this, after tomorrow with
the binary blobs. Whatever works better/best for anybody... Today one API,
tomorrow another... After tomorrow something completely different!
Redesigned APIs, completely. ;-)

It seems that I cleared it all, didn't I?

Good Luck with the sporadic solutions (whatever works the best/at all in
particular cases)!

Zoran

On Fri, Nov 3, 2017 at 2:48 PM, ron minnich <rminnich at gmail.com> wrote:

>
>
> On Fri, Nov 3, 2017 at 5:54 AM Zoran Stojsavljevic <
> zoran.stojsavljevic at gmail.com> wrote:
>
>>
>>
>> Your guy Stefan is here, asking for a help. Stefan got the straight
>> answer: FSP/Coreboot (intermingled), then U_Boot as payload... You got that?
>>
>>
>>
>
> Stefan got a suggestion from me that running u-boot as a coreboot payload
> might be easier, as it insulates u-boot from having to deal with FSP. I
> also commented that I had no complaint with them running without coreboot,
> since the more open source firmware we have the better. Either path is
> fine, whatever works best for u-boot.
>
> I don't understand your note at all Zoran, but I am not alone it seems.
>
> ron
>
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