[coreboot] coreboot community meeting minutes for May 11, 2017

[Martin Roth]

These are the minutes from today's coreboot community meeting.
Information about the next meeting is at the bottom.

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Thursday, May 11, 2017

General coreboot news & discussions
* The coreboot 4.6 release is done.
  - https://blogs.coreboot.org/blog/2017/05/08/announcing-coreboot-4-6/
  - coreboot release page was updated to include release notes.
  - Documentation on the release process will be added to the coreboot
repository shortly.
  - Look into having multiple people sign the tag and the .sig file.
Add this to the documentation.
  - Add sha256sum.txt to the coreboot downloads page.  It's present
and up-to-date in the directory, it just wasn't linked on the
downloads page.    https://coreboot.org/releases/sha256sum.txt
  - Put release notes into documentation directory.
* Work to join SFC is progressing.  Should be complete by next CCM.
* Announcement about removing platforms after 4.7 & 4.8 releases just went out.
  - After 4.7 - remove platforms that do not support cbmem in romstage.
  - After 4.8 - remove platforms that are not shown to be booting in
the board-status repo.
  - Questions about testing
  - Add list of removed boards to release notes.
  - In other projects people have the practice of tagging each driver
with WORKING/SKELETON/NON-WORKING flags. Whenever a new driver is
promoted, it shows up in the release notes. Something similar for the
deprecation of boards in coreboot would be useful. State it clearly on
each release note. Then perhaps a good thing also would be to keep a
log in the website/wiki-page, so that people could quickly find where
the old board code is available in the git commit history (preferably
with a git tag).
* Martin is working to add board library that people can send images
to for testing, but this hasn't been looked at in a while.  Maybe we
can work on this some while Philipp is in colorado for the coreboot
conference.
* We need to update board_status to handle variants and add more tests
than just booting
* Look at removing old board_status entries from the active branch.
Start tagging board_status when releases are done.
* We need to do more work to promote information about the
board_status repository and how to test with the board_status script.
Many people don't seem to be aware of this or how to add boards.
* What is the preferred platform for 64-bit arm?
  - Discuss on the mailing list?
  - Samsung chromebook-plus may be the best board right now.
  - Might be interesting:
https://cre-8.cmnty.com/blog/article/10/CRE-8-i.MX-8-Single-Board-Computer-The-beginning
i.MX 6 was popular for many free hardware projects (Novena, IIRC
etc.). Compared to all other ARM SoC vendors, NXP published
documentation in the past, I hope they will keep doing so.
* What is the current best effort on mitigating the risks related to
the Management Engine and how coreboot is positioned relating this
issue ?
  - ME Cleaner ( https://github.com/corna/me_cleaner ) may be the best solution
* Cleaned ME takes a long time to start booting before jumping to the
reset vector.  Haswell & Broadwell are tested and show this issue.
This doesn't show up in timestamps because it happens before coreboot
starts.


Conferences
* Sign up - Denver conference is in under a month -
https://coreboot.org/Denver2017
* System76 volunteered to host a mixer on Monday night.
* ECC 2017 got secunet and bochumer wirtschaftsförderung as sponsors


Infrastructure News
* The main coreboot server got an OS upgrade on Saturday.
* The main coreboot server rebooted yesterday (May 10), due to power
issues in the facility.  Not all of the services come back up
correctly, leading to some downtime for various services.  They expect
to have downtime again tonight (May 11) to replace a failed load-break
switch.  https://twitter.com/sixtopia/status/862435443647950848/photo/1
* The jenkins upgrade went smoothly on Sunday - these are planned to
happen on the first weekend of each month going forward.

Development
* Is anybody using baud_rate or debug_level CMOS options? They are a
PITA to maintain... want to remove them. The options are used in
console init which is done in multiple stages with ROMCC and GCC. Not
build tested, breaks everytime somebody touches console init (at least
feels like that).
  - We need to start build testing options like this. Anyone can add
to the tested configurations by simply enabling the options you want
tested and adding a mini-config file to the configs directory.  To
create the miniconfig, run 'make savedefconfig'.  The output is in the
file 'defconfig' by default.
  - It was pointed out that having these values in CMOS is useful on
server boards with a BMC that can access CMOS to change the debug
level.
 - On some boards no 'sane' default is provided which often ends up at
silly baud rates like 9600 when cmos is cleared.
    - We should definitely look at adding defaults to all boards that
are using CMOS.  Looking for a volunteer to take care of this.  Out of
182 boards with a cmos.layout file, only 39 have cmos.default files.
- Would it help to migrate to using ROM as the backing store for some
variables (likely involving fmap)?  (not in this case)

Interesting external News
* Intel ME exploit (
https://security-center.intel.com/advisory.aspx?intelid=INTEL-SA-00075
; https://www.tenable.com/blog/rediscovering-the-intel-amt-vulnerability
)
  - Looking for someone to give a talk at one of the coreboot
conferences about this.
* SciFive announced 64-bit riscv core.


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Next meeting is Thursday, May 25, 2017
Check the coreboot calendar for the time in your timezone
https://www.coreboot.org/calendar.html

Join using the bluejeans web app or the phone bridge:
    https://bluejeans.com/616384323

Phone bridge call in numbers:  https://www.bluejeans.com/numbers
    Meeting ID: 616384323

Current agenda & history:
    https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics