[coreboot] GRUB boot menu is not showing GRUB2
nico.huber at secunet.com
Wed Jun 7 12:25:59 CEST 2017
On 06.06.2017 16:53, Dhanasekar Jaganathan wrote:
> Hi All,
> I am trying to boot *Intel Rangeley CPU/ Mohon Peak *board by Coreboot. I
> am using *GRUB2 *as a Payload.
> In menuconfig, I have selected,
> Add a payload - *GRUB2*
> GRUB2 Version - *HEAD*.
> My mSata has two fedora OS. When I boot the system, I am not seeing GRUB
> boot load menu. System straightly booted to one of Fedora OS.
where do you expect to see the menu? a display? a serial console? In the
former case, I expect you have to add a Video BIOS to your coreboot.rom
(CONFIG_VGA_BIOS) and configure coreboot to run it (CONFIG_VGA_ROM_RUN).
If you use a discrete gfx card, you don't need to add the VBIOS, it
would be read from the card. In the latter case, GRUB has to be confi-
gured to use the serial port, as Mariusz pointed out.
I'm a little confused here, did you add an etc/grub.cfg to the CBFS? You
didn't say so but I wouldn't expect it to boot otherwise. If you have,
can you please share this grub.cfg.
> In */boot/default/grub*, I have changed* GRUB_TIMEOUT = -1* ( which stops
> the system indefinitely at boot menu in GRUB2). Still system is not
> stopping at boot menu.
AFAIK, this file only works as input to `grub-mkconfig`. You'd still
have to generate a grub.cfg with it and configure the GRUB payload to
> With other vendor BIOS on my board, I am seeing boot menu. I have observed
> they were using GRUB 2.02_Beta version.
> So, I have checked out GRUB 2.02_Beta and complied the source which
> produced *grub2.elf*.
> And, I have modified Payload as * Add a Payload* = *An ELF executable
> payload *and given the path of *grub2.elf*.
> After flashing this BIOS on my board, I am seeing error message,
> *lzma: Decodeing error = 1*
> *Payload not loaded.*
Could be related to the CBFS_SIZE, see below. Maybe the CBFS got cor-
> FYR, I have attached my *.config* file, Please view it.
You have set CONFIG_ROM_SIZE and CONFIG_CBFS_SIZE to the same value
(8MiB). This is wrong. coreboot shares the flash chip with other Intel
firmware components (Firmware Descriptor (IFD), ME firmware etc.). Be-
side other configuration, the IFD partitions the flash chip in regions.
coreboot's CBFS lives in the BIOS region and should be at most of this
region's size. You can decode the descriptor with `ifdtool -d ...` (you
can find it in util/ifdtool/ in the coreboot source).
Hope that helps,
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