[coreboot] R: Re: !IS_TOP_ALIGNED_ADDRESS failure

giuseppe.ferrigni at inwind.it giuseppe.ferrigni at inwind.it
Tue Jan 31 15:19:57 CET 2017


Hi Marshall,

thanks a lot for your advice. It works great!
This week I'll receive the flash programmer and then I'll start to test everything!

Giuseppe





----Messaggio originale----

Da: "Marshall Dawson" <marshalldawson3rd at gmail.com>

Data: 30/01/2017 16.51

A: "giuseppe.ferrigni at inwind.it"<giuseppe.ferrigni at inwind.it>

Cc: "coreboot"<coreboot at coreboot.org>

Ogg: Re: [coreboot] !IS_TOP_ALIGNED_ADDRESS failure



Hi Giuseppe,

When you try building by setting 
different mainboards, are you running make distclean between those 
attempts?  If not, you can easily wind up with a .config where settings 
and options aren't appropriate for your board.

For your Sapphire 
system, the AMD Bettong board might be close enough to get you started. 
 If you want to give it a shot, you can try the following.  Make sure 
you have some method for reflashing your original BIOS, of course, 
because this probably won't work initially.

1) Create a .config file using the following
CONFIG_USE_BLOBS=y
CONFIG_VENDOR_AMD=y
CONFIG_VGA_BIOS_ID="1002,9874"
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_FILE="3rdparty/blobs/northbridge/amd/00660F01/CarrizoGenericVbios.bin"
CONFIG_HUDSON_UART=y
CONFIG_VGA_ROM_RUN=y

2) Run make olddefconfig

3)
 I've assumed the board's two serial connectors are connected to the APU
 and not on a SuperIO (CONFIG_HUDSON_UART=y).  Unfortunately, the Merlin
 Falcon binaryPI has a "feature" that prevents this from working.  
Ricardo has an easy workaround to allow the UART to function.  
Cherry-pick the patch here:
https://review.coreboot.org/#/c/17924/

Thanks,
Marshall

On Sun, Jan 29, 2017 at 5:50 PM, giuseppe.ferrigni--- via coreboot <coreboot at coreboot.org> wrote:
Hello to all,

I'm getting confidence with coreboot for the first time. I followed instruction in the "Lesson1" article for a very basic build and everything gone well. Now I'm trying to build coreboot for a real board (amd ipc_fp4_dp not present in current release) but setting several mainbord devices results in different errors. One of these is the following:

cbfstool: /home/oxboxes/coreboot/util/cbfstool/cbfstool_image.c:666: cbfs_add_entry: Assertion '' !IS_TOP_ALIGNED_ADDRESS(content_offset)' failed

Due to lack of tutorial to understand the coreboot structure, can someone help me to understand why the building process fail?

Giuseppe

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