[coreboot] Back to original BIOS

Zoran Stojsavljevic zoran.stojsavljevic at gmail.com
Fri Feb 3 18:45:40 CET 2017


> Given the way vendors swap parts around, it would not be surprising to
find settings such as GPIOs that control mainboard
> resources and DRAM timing in flash. There's lots of ways to save some
money nowadays (e.g. remove SPD) and vendors
> do what they can to save it all.

Ron, any (practical) example of above described practices? I have in my
laptops here 6 x 4 GB DIMM modules and 2 x 8GB DIMM modules, all of them
have SPD mounted.

> There are also flash chips with original T400 bios on sale - what about
this?

Just waiting for you, Michael, to try it. All the possibilities we
lamented here, you got/have several proposals to try practically, and I see
it as very good learning experience, and understand more. I offered you one
SW method to try, you have original T400 boards with original BIOSes, you
can even buy flash chip with original BIOS (and you can also try to combine
proposals, also experiment). Several possibilities, one full 10 hours' day
of hard work (maybe two days, if you take it easy).

And, Enrico (although email is signed as Florian ?!) also wrote an
excellent email, with some very good explanation how BIOS descriptors and
regions look alike in T420 (I bet, it could be very useful).

Being you, I would roll up sleeves and start working... Trying various
proposals practically/empirically!

My two cent opinion! Peace. ;-)

Best Regards,
Zoran
_______

On Fri, Feb 3, 2017 at 3:15 PM, ron minnich <rminnich at gmail.com> wrote:

> Given the way vendors swap parts around, it would not be surprising to
> find settings such as GPIOs that control mainboard resources and DRAM
> timing in flash. There's lots of ways to save some money nowadays (e.g.
> remove SPD) and vendors do what they can to save it all.
>
> ron
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot
>
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