[coreboot] Doubt about SPD init in Skylake

[Zoran Stojsavljevic]

> The system must initialize some arrays before initializing
> the SPD in order to execute FspMemoryInit. I do not know
> what these arrays do, and how do I get these values when
> porting new motherboard.

It is, actually, vice versa (SPD is used for the IMC initialization).
Serial Presence Detect is a small flash, mounted on the DDR2/DDR3/DDR4
SIMM/DIMM modules, from where MRC algorithms read DDRx parameters, RAS
and CAS latencies, and configure IMC, as my best understanding is.

Please, refer to: https://en.wikipedia.org/wiki/Serial_presence_detect

This page also says: "Coreboot reads and uses SPD information to
initialize all memory controllers in a computer with timing, size and
other properties."

To find out yours SPD parameters, please, use the following tool for
WIN: https://www.cpuid.com/softwares/cpu-z.html

For Linux, please, use dmidecode Linux command.

Zoran

On Sat, Dec 30, 2017 at 8:56 AM, 王翔 <merle at tya.email> wrote:
> The system must initialize some arrays before initializing the SPD in order
> to execute FspMemoryInit.
> I do not know what these arrays do,  and how do I get these values when
> porting new motherboard.
>
> These codes exist on the SKYLAKE platform which using FSP2.0.  Call path :
> fsp_memory_init->do_fsp_memory_init->platform_fsp_memory_init_params_cb->mainboard_memory_init_params
>
> array list :
>     FSPM_UPD->FspmConfig->DqByteMapCh0
>     FSPM_UPD->FspmConfig->DqByteMapCh1
>     FSPM_UPD->FspmConfig->DqsMapCpu2DramCh0
>     FSPM_UPD->FspmConfig->DqsMapCpu2DramCh1
>     FSPM_UPD->FspmConfig->RcompResistor
>     FSPM_UPD->FspmConfig->RcompTarget
>
>
> If you can help me extremely grateful ! ! !
>
>
>
>
> ------------------
>
> 王翔
>
> 安全研究员
>
> 广州市腾御安信息科技有限公司
>
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>
>
>
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