[coreboot] Attempt to porting coreboot to Gigabyte ga-945gcm-s2l

Nico Huber nico.huber at secunet.com
Mon Oct 10 17:47:53 CEST 2016

Hi Arthur,

On 09.10.2016 18:50, Arthur Heymans wrote:
> Hi
> I'm trying to port coreboot to the gigabyte ga-945gcm-s2l, which has a
> 945gc northbridge, a ich7 southbridge and a ite it8718f sio. I'm trying
> all this with a 1067fsb cpu, so in that last aspect there is no
> precedent in coreboot.
> I encountered some raminit issues where the MCHBAR(CLKCFG) was
> incorrectly written, but this was fixed in
> https://review.coreboot.org/#/c/16940/.
> Right now I'm stuck in smm_init in southbridge/intel/i82801gx/smi.c.
> The boot process completely hangs when wbinvd() is called which supposed
> to "Write Back and Invalidate Cache" according to
> http://x86.renejeschke.de/html/file_module_x86_id_325.html.

This is just a synchronization point. The wbinvd() is there to ensure
that the memcpy() above has reached real RAM before the program con-

As this fails right after resources have been assigned to all devices, I
suspected a resource conflict but couldn't find any trouble in your log.

Another thing that can cause trouble is the MTRR configuration. I have
no idea in which state they are / should be in your case, though.

> What does this mean? Did the raminit not work?

This close to the end of ramstage I wouldn't expect trouble from a bad
raminit (you have already written/read plenty things to/from RAM). But
still, this could suffer from some wrong configuration done in romstage.


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