[coreboot] Attempt to porting coreboot to Gigabyte ga-945gcm-s2l
zoran.stojsavljevic at gmail.com
Mon Oct 10 08:12:36 CEST 2016
CPUID 1067x? Penryn? https://en.wikipedia.org/wiki/Penryn_(microprocessor)
It is long time off any radar screen for INTEL IOTG support, I can tell to
you this... Started production in 2007! :-(( WTH you need Coreboot on this
"The WBINVD instruction is a privileged instruction. *When the processor is
running in protected mode, the CPL of a program or procedure must be 0 to
execute this instruction.* This instruction is also a serializing
instruction (see "Serializing Instructions" in Chapter 8 of the IA-32 Intel
Architecture Software Developer's Manual, Volume 3)."
Question to you: do you execute this instruction (WBINVD) in Ring 0
(kernel) mode? If you do, and it still hangs, I have for you a good
suggestion: try to replace WBINVD with INVD and see if you'll hang (simple
logic stands behind what I read there:
If you hang: your problem is for sure/100% NOT raminit (in other words MRC);
If you do NOT hang, and continue: raminit (MRC) might be (but not
certainly???) your problem. If you hang later (while accessing DDRAM), then
it is obvious! ;-)
Good luck with this one,
On Sun, Oct 9, 2016 at 6:50 PM, Arthur Heymans <arthur at aheymans.xyz> wrote:
> I'm trying to port coreboot to the gigabyte ga-945gcm-s2l, which has a
> 945gc northbridge, a ich7 southbridge and a ite it8718f sio. I'm trying
> all this with a 1067fsb cpu, so in that last aspect there is no
> precedent in coreboot.
> I encountered some raminit issues where the MCHBAR(CLKCFG) was
> incorrectly written, but this was fixed in
> Right now I'm stuck in smm_init in southbridge/intel/i82801gx/smi.c.
> The boot process completely hangs when wbinvd() is called which supposed
> to "Write Back and Invalidate Cache" according to
> What does this mean? Did the raminit not work?
> Kind regards
> Arthur Heymans
> coreboot mailing list: coreboot at coreboot.org
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