[coreboot] Nehalem not booting with two ram sticks
Federico Amedeo Izzo
federico.izzo42 at gmail.com
Sat Nov 26 22:57:54 CET 2016
On 11/23/2016 10:14 AM, Zoran Stojsavljevic wrote:
>
> Federico, I have here also suggestion for you. You should try to run
> only one DDR memory stick, and then record the memory values (since I
> see from your logs that they are identical for both memories/DDRs),
> and then to try to hard-code them for both sticks, altogether avoiding
> raminit.c setup, and see if this improves your situation?!
Hi Zoran and others,
I finally flashed again coreboot after trying the Lenovo BIOS.
I used the decode-dimms util to dump RAM info while on the Lenovo BIOS
with both RAM sticks,
and run the same program on the coreboot BIOS with just one stick.
Sadly the output on coreboot is the same of the output on Lenovo BIOS so
no info gained by this.
I will attach the output from the Lenovo BIOS in case it turns out useful.
The next step I will try will be to modify raminit.c of Nehalem to
accept hardcoded frequency as SandyBridge does,
hoping that this will be a temporary fix to get the two DIMMs working.
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# decode-dimms version 6231 (2014-02-20 10:54:34 +0100)
Memory Serial Presence Detect Decoder
By Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner,
Jean Delvare, Trent Piepho and others
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/7-0050
Guessing DIMM is in bank 1
---=== SPD EEPROM Information ===---
EEPROM CRC of bytes 0-116 OK (0xFC7B)
# of bytes written to SDRAM EEPROM 176
Total number of bytes in EEPROM 256
Fundamental Memory type DDR3 SDRAM
Module Type SO-DIMM
---=== Memory Characteristics ===---
Fine time base 1.000 ps
Medium time base 0.125 ns
Maximum module speed 1333 MHz (PC3-10600)
Size 4096 MB
Banks x Rows x Columns x Bits 8 x 15 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Bus Width Extension 0 bits
tCL-tRCD-tRP-tRAS 9-9-9-24
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T, 5T
---=== Timing Parameters ===---
Minimum Write Recovery time (tWR) 15.000 ns
Minimum Row Active to Row Active Delay (tRRD) 6.000 ns
Minimum Active to Auto-Refresh Delay (tRC) 49.125 ns
Minimum Recovery Delay (tRFC) 160.000 ns
Minimum Write to Read CMD Delay (tWTR) 7.500 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.500 ns
Minimum Four Activate Window Delay (tFAW) 30.000 ns
---=== Optional Features ===---
Operable voltages 1.5V
RZQ/6 supported? Yes
RZQ/7 supported? Yes
DLL-Off Mode supported? Yes
Operating temperature range 0-95 degrees C
Refresh Rate in extended temp range 1X
Auto Self-Refresh? No
On-Die Thermal Sensor readout? No
Partial Array Self-Refresh? No
Thermal Sensor Accuracy Not implemented
SDRAM Device Type Standard Monolithic
---=== Physical Characteristics ===---
Module Height (mm) 30
Module Thickness (mm) 2 front, 2 back
Module Width (mm) 67.6
Module Reference Card F
---=== Manufacturer Data ===---
Module Manufacturer Samsung
DRAM Manufacturer Samsung
Manufacturing Location Code 0x03
Manufacturing Date 2012-W05
Assembly Serial Number 0x006A832D
Part Number M471B5273DH0-CH9
Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/7-0051
Guessing DIMM is in bank 2
---=== SPD EEPROM Information ===---
EEPROM CRC of bytes 0-116 OK (0xFC7B)
# of bytes written to SDRAM EEPROM 176
Total number of bytes in EEPROM 256
Fundamental Memory type DDR3 SDRAM
Module Type SO-DIMM
---=== Memory Characteristics ===---
Fine time base 1.000 ps
Medium time base 0.125 ns
Maximum module speed 1333 MHz (PC3-10600)
Size 4096 MB
Banks x Rows x Columns x Bits 8 x 15 x 10 x 64
Ranks 2
SDRAM Device Width 8 bits
Bus Width Extension 0 bits
tCL-tRCD-tRP-tRAS 9-9-9-24
Supported CAS Latencies (tCL) 9T, 8T, 7T, 6T, 5T
---=== Timing Parameters ===---
Minimum Write Recovery time (tWR) 15.000 ns
Minimum Row Active to Row Active Delay (tRRD) 6.000 ns
Minimum Active to Auto-Refresh Delay (tRC) 49.125 ns
Minimum Recovery Delay (tRFC) 160.000 ns
Minimum Write to Read CMD Delay (tWTR) 7.500 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.500 ns
Minimum Four Activate Window Delay (tFAW) 30.000 ns
---=== Optional Features ===---
Operable voltages 1.5V
RZQ/6 supported? Yes
RZQ/7 supported? Yes
DLL-Off Mode supported? Yes
Operating temperature range 0-95 degrees C
Refresh Rate in extended temp range 1X
Auto Self-Refresh? No
On-Die Thermal Sensor readout? No
Partial Array Self-Refresh? No
Thermal Sensor Accuracy Not implemented
SDRAM Device Type Standard Monolithic
---=== Physical Characteristics ===---
Module Height (mm) 30
Module Thickness (mm) 2 front, 2 back
Module Width (mm) 67.6
Module Reference Card F
---=== Manufacturer Data ===---
Module Manufacturer Samsung
DRAM Manufacturer Samsung
Manufacturing Location Code 0x03
Manufacturing Date 2012-W05
Assembly Serial Number 0x006A8319
Part Number M471B5273DH0-CH9
Number of SDRAM DIMMs detected and decoded: 2
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