[coreboot] Nehalem not booting with two ram sticks

Charlotte Plusplus pluspluscharlotte at gmail.com
Tue Nov 22 20:30:19 CET 2016

I have had similar issues with Corsair ram on the W520 recently: sometimes
not booting at all, sometimes being unstable (in memest) after a succesfull

The only way I could get the 4 dimms to work was to hardcode some SPDs, or
set the MCU to a much slower speed.

Like you, I found removing even 1 stick did help a lot: the raminit
succeeded much more frequently as a higher MCU, even if this MCU still
lower than the one the RAM is rated for, or that worked in the factory bios.

I tried using the MRC blob to compare the timings, but I must have done
something wrong in my code as it didn't work at all

My guess is something is really wrong in the raminit code. I read up too
much specs and code for no result, so I just gave up on this.

Hopefully more people getting similar problems will mean the MRC will be
added back as an option next to the native raminit. This would facilite
comparison on all boards, and identification of whatever bug there may be.
(imagine figuring out native video init issues if there was no way to use a
VGA option rom)


On Tue, Nov 22, 2016 at 8:22 AM, Andrey Korolyov <andrey at xdel.ru> wrote:

> On Tue, Nov 22, 2016 at 3:35 PM, Federico Amedeo Izzo
> <federico.izzo42 at gmail.com> wrote:
> > Hello,
> >
> > I have a problem with my ThinkPad X201 (nehalem)
> >
> > I have two sticks of Samsung 4GB 2Rx8 PC3-10600S (1333MHz)
> > When i use only one of them in one of the two slots, the computer boots
> > fine,
> > but when i use both of them in the two slots, the computer doesn't boot,
> > the screen doens't even turn on.
> >
> > I dumped the logs via EHCI but they seem normal, in fact both the
> > working combination and the broken one make 34 or so iterations of
> > Timings dumping,
> > but then the working conf. start booting, while the broken one freezes
> > without printing error messages on the EHCI.
> >
> > I have tried adding more `printk` calls in
> > `src/northbridge/intel/nehalem/raminit.c`
> > but ended up in a brick, probably because i slowed down the
> > initialization too much.
> >
> > I attach three EHCI logs:
> > - the first stick in the first slot: working
> > - the second stick in the second slot: working
> > - both stick inserted: not working
> >
> > Also i find difficult to understand the code in `raminit.c` of nehalem
> > because it lacks almost completely of comments, with respect to
> > raminit.c of sandybridge for example.
> I`ve seen simular issue on my x201(t), the workaround could be a
> hardcoded SPD limitation from above for memory clock speed. Using
> different memory sticks (Kingstons rather than Samsungs) is 'solving'
> problem as well. I`ve not paid necessary attention to the problem at
> the time, so if you have some spare cycles, you could possibly want to
> figure out right SPD settings. The simplest way is to use decode-dimms
> from i2c-tools or CPU-z and to compare vendor`s settings with single-
> and dual-dimm setups and coreboot`s with a single dimm.
> --
> coreboot mailing list: coreboot at coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot
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