[coreboot] [regression] Increased romstage boot time on ASRock E350M1 (AMD Family 14h)
gaumless at gmail.com
Sun Jan 10 19:01:42 CET 2016
I can take a look.
On Sun, Jan 10, 2016 at 5:40 AM, Paul Menzel
<paulepanter at users.sourceforge.net> wrote:
> Dear coreboot folks,
> on the ASRock E350M1, I lately noticed that the SeaBIOS banner takes
> longer to appear. And looking at the logs board status , the time
> stamps stored in CBMEM confirm this.
> $ grep 1st asrock/e350m1/4.2-*/*/coreboot_timestamps.txt
> asrock/e350m1/4.2-33-g42444f6/2015-10-30T17:54:28Z/coreboot_timestamps.txt: 0:1st timestamp 368,199
> asrock/e350m1/4.2-36-g0ace013/2015-10-31T13:22:12Z/coreboot_timestamps.txt: 0:1st timestamp 368,416
> asrock/e350m1/4.2-37-gab35575/2015-10-31T18:23:47Z/coreboot_timestamps.txt: 0:1st timestamp 367,904
> asrock/e350m1/4.2-41-g3c47e8a/2015-10-31T20:39:02Z/coreboot_timestamps.txt: 0:1st timestamp 367,829
> asrock/e350m1/4.2-42-g0746452/2015-10-31T21:11:04Z/coreboot_timestamps.txt: 0:1st timestamp 368,081
> asrock/e350m1/4.2-43-g160ad6a/2015-10-31T21:12:09Z/coreboot_timestamps.txt: 0:1st timestamp 368,290
> asrock/e350m1/4.2-44-gbabb2e6/2015-10-31T21:14:48Z/coreboot_timestamps.txt: 0:1st timestamp 368,023
> asrock/e350m1/4.2-53-gf6dc544/2015-11-01T13:27:02Z/coreboot_timestamps.txt: 0:1st timestamp 368,470
> asrock/e350m1/4.2-58-g65eec4d/2015-11-02T15:41:33Z/coreboot_timestamps.txt: 0:1st timestamp 679,462
> asrock/e350m1/4.2-628-g62c0276/2015-12-29T17:17:01Z/coreboot_timestamps.txt: 0:1st timestamp 1,528,198
> asrock/e350m1/4.2-701-gb95a074/2016-01-08T01:44:15Z/coreboot_timestamps.txt: 0:1st timestamp 1,298,841
> asrock/e350m1/4.2-702-gfecc24a/2016-01-08T16:21:59Z/coreboot_timestamps.txt: 0:1st timestamp 1,289,489
> asrock/e350m1/4.2-703-g8846382/2016-01-09T21:18:59Z/coreboot_timestamps.txt: 0:1st timestamp 1,289,756
> Unfortunately, there was a time, where I had forgotten to select this
> option, so I am still bisecting this.
> I thought, it might have been fixed with the commit 4.2-630-g65e33c0
> below , but it’s not.
> commit 65e33c08a9a88c52baaadaf515b9591856115a77
> Author: Nico Huber <nico.huber at secunet.com>
> Date: Mon Dec 28 20:17:13 2015 +0100
> x86: Align CBFS on top of ROM
> Since the introduction of the new (interim?) master header, coreboot
> searches the whole ROM for CBFS entries. Fix that by aligning it on top
> of the ROM.
> Change-Id: I080cd4b746169a36462a49baff5e114b1f6f224a
> Do you know, which commit the commit message referred to?
> Looking more into it, Nico’s commit was reverted in commit 4.2-673-
> g12c55ed  and the logic reworked.
> commit 12c55eda11453ed1e7a24e218338831f67cd5de6
> Author: Aaron Durbin <adurbin at chromium.org>
> Date: Mon Jan 4 13:57:07 2016 -0600
> Revert "x86: Align CBFS on top of ROM"
> This reverts commit 65e33c08a9a88c52baaadaf515b9591856115a77.
> This was the wrong logic to fix the master header.
> Change-Id: I4688034831f09ac69abfd0660c76112deabd62ec
> If you have any suggestions, please tell me. Otherwise, I’d continue
> trying to bisect this.
> And unfortunately, I am unable to provide romstage messages, as I still
> haven’t got the serial header for the board.
> So if somebody else, Stefan, Martin, Kevin, could provide that, that
> would be awesome.
> PS: I’ll try to create a ticket for this issue in the bug tracker 
> this evening.
>  https://review.coreboot.org/gitweb?p=board-status.git;a=summary
>  https://review.coreboot.org/12810
>  https://review.coreboot.org/12824
>  https://ticket.coreboot.org/
> coreboot mailing list: coreboot at coreboot.org
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