[coreboot] Test hardware initialization in emulator

Zoran Stojsavljevic zoran.stojsavljevic at gmail.com
Thu Aug 25 07:24:16 CEST 2016


> Now I wanted to learn the "hard" part, mainly RAM initialization and PCI
enumeration.

Hard part, indeed, I should say. RAM init = MRC (INTEL IP), PCIe
enumeration, also IP, also part of FSP (there are open source alternatives
to PCIe enumeration). To really learn these, you should either have/obtain
source code, either to do reverse engineering.

None of these are easy. Maybe, upon getting HW, you should a bit explore
algorithms inside FSP using JTAG debugger (solely for the learning
experiences/purposes). Just a thought.

Zoran

On Wed, Aug 24, 2016 at 11:31 AM, Rishav Ambasta <kooolrishav at gmail.com>
wrote:

> I am exploring Coreboot.
> I had bought a Minnowboard, which will take some time to arrive.
> Meanwhile I wanted to carry out the learning on an emulator.
> I had compiled a ROM for QEMU and it ran successfully. I even tried with
> different payloads (which I hear is the easy part of the boot process)
> Now I wanted to learn the "hard" part, mainly RAM initialization and PCI
> enumeration.
>
> I had generated a ROM using the Minnowboard FSP, but I was not able to
> boot QEMU using it.
>
> Need suggestions on how can one, trace or at-least log the steps in the
> boot-block stage, ROM stage and RAM stage of Minnowboard on an Emulator.
>
> Regards,
> *Rishav Ambasta*
>
> *Save Plants, Save Life ...*
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot
>
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