[coreboot] Strange postcodes

Łukasz Dobrowolski spectrallynx at gmail.com
Mon Aug 8 02:12:28 CEST 2016


@Zoran: You are right. I just didn't know where those codes mean.
After adding VGA BIOS i got to see the result.

@Patrick: Seems that I haven't searched well enough. Sorry for the noise.

In the thread Zoran pointed me to there was a nice idea to redirect
normal postcodes to different address or disable them. If something
else was writting postcodes then i would be easy to confirm that.

Thanks You for Your help Zoran, Patrick!

On 8/7/16, Zoran Stojsavljevic <zoran.stojsavljevic at gmail.com> wrote:
>> 79 24 98 7A A8 *F8*
>>...
>> Any thoughts?
>
> If you came to 0xF8 postcode, you successfully booted Coreboot. So, your
> question is not too clear to me?!
>
> You can also read this thread, it might help you:
> https://www.mail-archive.com/coreboot@coreboot.org/msg46341.html
>
> Zoran
>
> On Sun, Aug 7, 2016 at 10:11 AM, Łukasz Dobrowolski
> <spectrallynx at gmail.com>
> wrote:
>
>> Hello!
>> I'm porting cb to ThinkPad X120e. I've used code from asrock/e350m1 as
>> basis and made some small changes.
>>
>> I'm getting following postcodes. Those are after "50" so romstage.c
>> finished executing. (System sometimes goes this far, other times it
>> hangs earlier.)
>>         79 24 98 7A A8 F8
>>
>> I tried to find them in like this:
>>         grep -R 'post_code(0x24);'
>> I've only found "24", it's in device/pci_device.c:1113. Whatever is
>> sending the rest of the postcodes is not using post_code() function.
>>
>> I can think of 3 explanations:
>>         Payload is sending those postcodes. -> Seams unlikely, I'm
>> using Seabios. I've read some of the code and can't find any places
>> that would send the codes.
>>         ASM parts of cb/AGESA.
>>         EC(ITE IT8518E) is sending the codes.
>>
>> Any thoughts?
>>
>> --
>> coreboot mailing list: coreboot at coreboot.org
>> https://www.coreboot.org/mailman/listinfo/coreboot
>>
>



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