[coreboot] G505s status (and test report)

[Felix Held]

Hi Florentin!

>   -3) The USB3 does NOT work : the 3rdparty xhci blob (${COREBOOT}/3rdparty/blobs/southbridge/amd/hudson/xhci.bin) is not correct!..
> PLEASE HELP : can someone give me a tip or advice, how to extract this blob (from uefi image or/sys/<whatever..>)?
You have to use the Bolton USB3 blob if you want to get USB3 somewhere 
near working; it's in the blobs repo. The laptop uses a Bolton and not a 
Hudson FCH, which have a newer version of the XHCI controller component 
(I've verified that they have different boot-ROMs; my 
fch_xhci_rom_dumper can extract both ).
I wrote some patch selecting the right blob (still somewhere in gerrit), 
but you need to patch the vendorcode to get USB3 working (at least at 
some place in the code it matches onto the PCI ID of the XHCI 
controller, which is different). I stopped my efforts to add support for 
Bolton to source AGESA, since doing stuff right would at least imply 
refactoring and unifying the FCH code if not rewriting it and I'm not 
really motivated to do that in my spare time.

Regards
Felix