[coreboot] Has anyone seen RTD2132 DP2LVDS converter configuration via DPCD

[mrnuke]

So, as I was iotracing atombios execution from within linux. The hardware 
connection is pretty straightforward: AMD Trinity DP0 -> RTD2132 -> LVDS 
panel. I noticed a set of very interesting DPCD accesses [1], to registers 
marked as "RESERVED for Branch device usage" by the Display Port spec.

Looking carefully at how those accesses are done, it seems 0x5f0/0x5f1 are a 
big-endian index port, and 0x5f3 is the data port. Most likely, these lead to 
some internal register space of the RTD2132. Whether this is the same as the 
I2C space or not is unknown at this time.

So, for those of you who had worked with this chip before, do these accesses 
look familiar? I wasn't able to find any sources that mess with the RTD2132 on 
the DPCD level.

Alex
 
=== Appendix [1]: RAW DPCD channel transactions ===

0x5f0 <- 0x00, 0x02
0x5f2 -> 0x20
0x5f0 <- 0x00, 0x03
0x5f2 -> 0x31
0x5f0 <- 0x00, 0x05, 0x3d
0x5f0 <- 0x00, 0x1f, 0x03
0x5f0 <- 0x00, 0xba, 0x00
0x5f0 <- 0x00, 0xbb, 0x08
0x5f0 <- 0x00, 0xb1, 0x4b
0x5f0 <- 0x01, 0x73, 0x69
0x5f0 <- 0x01, 0x9f, 0x24
0x5f0 <- 0x00, 0x19, 0x33
0x5f0 <- 0x00, 0x89, 0x39
0x5f0 <- 0x00, 0xf8, 0x42
0x5f0 <- 0x00, 0xf9, 0x01
0x5f0 <- 0x00, 0xfa, 0x23
0x5f0 <- 0x00, 0xfb, 0x45
0x5f0 <- 0x00, 0xfc, 0x67
0x5f0 <- 0x00, 0xfd, 0x89
0x5f0 <- 0x00, 0xfe, 0xab
0x5f0 <- 0x00, 0x1d, 0x25
0x5f0 <- 0x01, 0xc3, 0x07
0x5f0 <- 0x01, 0xc2, 0x5a
0x5f0 <- 0x01, 0xc4, 0x03
0x5f0 <- 0x01, 0xc0, 0x07
0x5f0 <- 0x01, 0xc1, 0x5a
0x5f0 <- 0x01, 0xb1, 0x03
0x5f0 <- 0x01, 0xbf, 0x7d
0x5f0 <- 0x01, 0xb5, 0x63
0x5f0 <- 0x01, 0xcb, 0x80
0x5f0 <- 0x01, 0xb3, 0x66
0x5f0 <- 0x01, 0xb2, 0x9a
0x5f0 <- 0x00, 0x9f, 0x00
0x5f0 <- 0x01, 0x83, 0x14
0x5f0 <- 0x00, 0xa7, 0xc2
0x5f0 <- 0x01, 0x71, 0x12
0x5f0 <- 0x01, 0x82, 0x5d
0x5f0 <- 0x01, 0x89, 0x28
0x5f0 <- 0x01, 0xbe, 0x01
0x5f0 <- 0x00, 0x8a, 0x53
0x5f0 <- 0x00, 0x0a, 0x01
0x5f0 <- 0x01, 0xd4, 0x10
0x5f0 <- 0x00, 0xf3, 0x00
0x5f0 <- 0x00, 0xf4, 0x3c
0x5f0 <- 0x01, 0xb4, 0x06
0x5f0 <- 0x00, 0xdc, 0x00
0x5f0 <- 0x00, 0xdd, 0x00
0x5f0 <- 0x01, 0x91, 0x20
0x5f0 <- 0x00, 0xd1, 0x06
0x5f0 <- 0x00, 0xd6, 0x01
0x5f0 <- 0x01, 0xd2, 0x08
0x5f0 <- 0x01, 0xd3, 0x80

=== Appendix [2]: Presumed accesses to RTD2132 internal register space ===

READ: 0x0002 -> 0x02
READ: 0x0003 -> 0x31
WRITE: 0x0005 <- 3d
WRITE: 0x001f <- 03
WRITE: 0x00ba <- 00
WRITE: 0x00bb <- 08
WRITE: 0x00b1 <- 4b
WRITE: 0x0173 <- 69
WRITE: 0x019f <- 24
WRITE: 0x0019 <- 33
WRITE: 0x0089 <- 39
WRITE: 0x00f8 <- 42
WRITE: 0x00f9 <- 01
WRITE: 0x00fa <- 23
WRITE: 0x00fb <- 45
WRITE: 0x00fc <- 67
WRITE: 0x00fd <- 89
WRITE: 0x00fe <- ab
WRITE: 0x001d <- 25
WRITE: 0x01c3 <- 07
WRITE: 0x01c2 <- 5a
WRITE: 0x01c4 <- 03
WRITE: 0x01c0 <- 07
WRITE: 0x01c1 <- 5a
WRITE: 0x01b1 <- 03
WRITE: 0x01bf <- 7d
WRITE: 0x01b5 <- 63
WRITE: 0x01cb <- 80
WRITE: 0x01b3 <- 66
WRITE: 0x01b2 <- 9a
WRITE: 0x009f <- 00
WRITE: 0x0183 <- 14
WRITE: 0x00a7 <- c2
WRITE: 0x0171 <- 12
WRITE: 0x0182 <- 5d
WRITE: 0x0189 <- 28
WRITE: 0x01be <- 01
WRITE: 0x008a <- 53
WRITE: 0x000a <- 01
WRITE: 0x01d4 <- 10
WRITE: 0x00f3 <- 00
WRITE: 0x00f4 <- 3c
WRITE: 0x01b4 <- 06
WRITE: 0x00dc <- 00
WRITE: 0x00dd <- 00
WRITE: 0x0191 <- 20
WRITE: 0x00d1 <- 06
WRITE: 0x00d6 <- 01
WRITE: 0x01d2 <- 08
WRITE: 0x01d3 <- 80