[coreboot] Can I upstream an UEFI payload binary for MinnowMax board project
Scott Duplichan
scott at notabs.org
Thu Feb 5 07:08:29 CET 2015
Yang, York [mailto:york.yang at intel.com] wrote:
]Sent: Wednesday, February 04, 2015 01:22 PM
]To: Patrick Georgi
]Cc: coreboot at coreboot.org
]Subject: Re: [coreboot] Can I upstream an UEFI payload binary for MinnowMax board project
]Actually we also work on a solution to build an UEFI payload easier
](open source too), but it takes time to complete. Hence we are looking
]for a short team solution, and the binary upstreaming is just an idea to
]ask whether community is allowing such work. Never mind, we will keep
]evaluating another solution and make it happen as soon as possible.
]Github is a very good suggestion. Thank you very much Patrick.
]York
Making your payload project easy to build is not difficult. Here are
some ideas...
1) Use the latest EDK2 trunk code instead of the UDK2014 snapshot.
2) Make the project build with gcc and Microsoft tool chains.
3) Commit the code to https://svn.code.sf.net/p/edk2/code/trunk/edk2.
1) This way, it will be an official EDK2 project. Given that most of
the recent EDK2 code commits have been for ARM or QEMU, a new Intel
project would provide some needed variety. Committing the code to
the main EDK2 repository will make getting all the needed source
code easy.
2) Many readers of this list build using gcc, so supporting gcc is
important. It is also easy because EDK2 officially supports gcc
tool chains running from Windows and Linux. Gcc tool chains for
Windows are here:
http://sourceforge.net/projects/edk2developertoolsforwindows/
With the attached patch applied to your code, build testing using
EDK2 trunk latest (SVN 16758) passes for all 48 combinations of
release/debug, 32/64, and the following tool chains: DDK3790,
VS2005, VS2008, VS2010, VS2012, VS2013, GCC44, GCC45, GCC46,
GCC47, GCC48, GCC49.
3) Committing the code to the EDK2 repository. This takes a little
work. You submit a patch and then wait for some code review. You
would have to de-tabify the code to get it past code review.
EDK2 has no automated build server. I could do build testing but
I have no way to boot test.
Here is what the patch does:
CbSupportDxe.c -- fix a function prototype that differs from the
actual function. The difference only affects gcc tool chains
because gcc builds use a default abi of sysv and not ms.
CbSupportPei.c -- add 'll' suffix to a 64-bit constant. This is
needed only for old gcc tool chains (gcc 4.4).
CbParseLib.h, CbParseLib.c -- change prototype to avoid gcc error.
Also remove unused functions to prevent a gcc build fail.
SecEntry.S -- format constant the way gas wants it.
SerialIo.c -- use extra braces around initialization data
to prevent gcc build fail.
CorebootPayloadPkg.fdf - expand binary size a little to
accommodate the gcc debug build. The gcc release build fits
without change. Gcc builds are bigger because EDK2 does not
yet enable gcc link time optimization.
--- payload.patch ---
diff -rupN original/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c modified/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
--- original/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c 2014-06-24 03:04:33.927000000 -0500
+++ modified/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c 2015-02-04 22:08:06.005430400 -0600
@@ -98,9 +98,10 @@ CbReserveResourceInGcd (
**/
VOID
+EFIAPI
OnReadyToBoot (
- EFI_EVENT Event,
- VOID *Context
+ IN EFI_EVENT Event,
+ IN VOID *Context
)
{
//
@@ -122,6 +123,7 @@ OnReadyToBoot (
**/
EFI_STATUS
+EFIAPI
CbDxeEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
diff -rupN original/CorebootModulePkg/CbSupportPei/CbSupportPei.c modified/CorebootModulePkg/CbSupportPei/CbSupportPei.c
--- original/CorebootModulePkg/CbSupportPei/CbSupportPei.c 2014-06-24 03:04:33.662000000 -0500
+++ modified/CorebootModulePkg/CbSupportPei/CbSupportPei.c 2015-02-04 22:12:39.551910800 -0600
@@ -239,7 +239,7 @@ CbPeiEntryPoint (
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
- (EFI_PHYSICAL_ADDRESS)(0x100000000),
+ (EFI_PHYSICAL_ADDRESS)(0x100000000ll),
HighMemorySize
);
}
diff -rupN original/CorebootModulePkg/Include/Coreboot.h modified/CorebootModulePkg/Include/Coreboot.h
--- original/CorebootModulePkg/Include/Coreboot.h 2014-06-17 21:15:25.814000000 -0500
+++ modified/CorebootModulePkg/Include/Coreboot.h 2015-02-04 16:38:57.524177800 -0600
@@ -45,7 +45,9 @@
#ifndef _COREBOOT_PEI_H_INCLUDED_
#define _COREBOOT_PEI_H_INCLUDED_
+#if defined(_MSC_VER)
#pragma warning( disable : 4200 )
+#endif
#define DYN_CBMEM_ALIGN_SIZE (4096)
diff -rupN original/CorebootModulePkg/Include/Library/CbParseLib.h modified/CorebootModulePkg/Include/Library/CbParseLib.h
--- original/CorebootModulePkg/Include/Library/CbParseLib.h 2014-06-24 03:04:33.958000000 -0500
+++ modified/CorebootModulePkg/Include/Library/CbParseLib.h 2015-02-04 15:40:00.544565300 -0600
@@ -63,7 +63,7 @@ CbParseCbMemTable (
**/
RETURN_STATUS
CbParseAcpiTable (
- IN VOID** pMemTable,
+ IN VOID* pMemTable,
IN UINT32* pMemTableSize
);
diff -rupN original/CorebootModulePkg/Library/CbParseLib/CbParseLib.c modified/CorebootModulePkg/Library/CbParseLib/CbParseLib.c
--- original/CorebootModulePkg/Library/CbParseLib/CbParseLib.c 2014-06-24 03:04:34.021000000 -0500
+++ modified/CorebootModulePkg/Library/CbParseLib/CbParseLib.c 2015-02-04 16:32:34.355304700 -0600
@@ -31,16 +31,6 @@ static UINT64 cb_unpack64(struct cbuint6
return (((UINT64) val.hi) << 32) | val.lo;
}
-static const char *cb_mb_vendor_string(const struct cb_mainboard *cbm)
-{
- return (char *)(cbm->strings + cbm->vendor_idx);
-}
-
-static const char *cb_mb_part_string(const struct cb_mainboard *cbm)
-{
- return (char *)(cbm->strings + cbm->part_number_idx);
-}
-
VOID *
FindCbTag (
IN VOID *Start,
@@ -245,11 +235,11 @@ CbParseCbMemTable (
**/
RETURN_STATUS
CbParseAcpiTable (
- IN VOID** pMemTable,
+ IN VOID* pMemTable,
IN UINT32* pMemTableSize
)
{
- return CbParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), pMemTable, pMemTableSize);
+ return CbParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), (void **)pMemTable, pMemTableSize);
}
/**
diff -rupN original/CorebootModulePkg/SecCore/Ia32/SecEntry.S modified/CorebootModulePkg/SecCore/Ia32/SecEntry.S
--- original/CorebootModulePkg/SecCore/Ia32/SecEntry.S 2014-06-17 21:15:26.064000000 -0500
+++ modified/CorebootModulePkg/SecCore/Ia32/SecEntry.S 2015-02-04 16:43:17.249033900 -0600
@@ -46,7 +46,7 @@ ASM_PFX(_ModuleEntryPoint):
#
# Construct the temporary memory at 0x80000, length 0x10000
#
- movl ($BASE_512KB + $SIZE_64KB), %esp
+ movl $(BASE_512KB + SIZE_64KB), %esp
#
# Pass BFV into the PEI Core
diff -rupN original/CorebootPayloadPkg/CorebootPayloadPkg.fdf modified/CorebootPayloadPkg/CorebootPayloadPkg.fdf
--- original/CorebootPayloadPkg/CorebootPayloadPkg.fdf 2014-06-29 21:53:30.992000000 -0500
+++ modified/CorebootPayloadPkg/CorebootPayloadPkg.fdf 2015-02-04 18:13:08.571703300 -0600
@@ -17,15 +17,15 @@
################################################################################
[FD.UefiPayload]
BaseAddress = 0x800000|gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase
-Size = 0x400000|gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize
+Size = 0x402000|gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize
ErasePolarity = 1
BlockSize = 0x1000
-NumBlocks = 0x400
+NumBlocks = 0x402
-0x00000000|0x020000
+0x00000000|0x022000
FV = PEIFV
-0x00020000|0x3E0000
+0x00022000|0x3E0000
FV = DXEFV
################################################################################
diff -rupN original/CorebootPayloadPkg/SerialDxe/SerialIo.c modified/CorebootPayloadPkg/SerialDxe/SerialIo.c
--- original/CorebootPayloadPkg/SerialDxe/SerialIo.c 2014-06-17 21:15:26.224000000 -0500
+++ modified/CorebootPayloadPkg/SerialDxe/SerialIo.c 2015-02-04 16:59:42.921165200 -0600
@@ -37,18 +37,18 @@ typedef struct {
SIMPLE_TEXT_OUT_DEVICE_PATH mDevicePath = {
{
- { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, sizeof (VENDOR_DEVICE_PATH), 0},
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0} },
EFI_SERIAL_IO_PROTOCOL_GUID // Use the drivers GUID
},
{
- { MESSAGING_DEVICE_PATH, MSG_UART_DP, sizeof (UART_DEVICE_PATH), 0},
+ { MESSAGING_DEVICE_PATH, MSG_UART_DP, { sizeof (UART_DEVICE_PATH), 0} },
0, // Reserved
FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
FixedPcdGet8 (PcdUartDefaultParity), // Parity (N)
FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
},
- { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, sizeof (EFI_DEVICE_PATH_PROTOCOL), 0}
+ { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
};
EFI_HANDLE gHandle = NULL;
--- build-commands.txt ---
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t DDK3790 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t DDK3790 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t DDK3790 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t DDK3790 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t VS2005x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t VS2005x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t VS2005x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t VS2005x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t VS2008x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t VS2008x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t VS2008x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t VS2008x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t VS2010x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t VS2010x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t VS2010x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t VS2010x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t VS2012x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t VS2012x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t VS2012x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t VS2012x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t VS2013x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t VS2013x86 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t VS2013x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t VS2013x86 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC44 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC44 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC44 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC44 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC45 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC45 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC45 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC45 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC46 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC46 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC46 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC46 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC47 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC47 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC47 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC47 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC48 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC48 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC48 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC48 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t GCC49 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t GCC49 -n 0 -a IA32
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t GCC49 -n 0 -a IA32 -a X64
build.exe -p D:\edk2build\edk2\CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t GCC49 -n 0 -a IA32 -a X64
--------------------------
Thanks,
Scott
]-----Original Message-----
]From: Patrick Georgi [mailto:patrick at georgi-clan.de]
]Sent: Wednesday, February 04, 2015 11:55 AM
]To: Yang, York
]Cc: coreboot at coreboot.org
]Subject: Re: [coreboot] Can I upstream an UEFI payload binary for MinnowMax board ]project
]
]Am 2015-02-04 19:27, schrieb Yang, York:
]> I was told that to build an UEFI payload need to get two components
]> from different sites, sounds I got some information out-of-date. I
]> will try getting the corebootPkg and then build a payload myself.
]corebootPkg is very likely a different project from yours. There are several attempts ]to make Tianocore into a payload.
]
]The thing is, if you want to make it easier on MinnowMax users, you (or anyone else) ]could open an account on github, fork the Tianocore repository there
](https://github.com/tianocore/edk2)
]and integrate the stuff from firmware.intel.com/develop.
]
]After that, users of that payload version can just pull the entire code with a single ]git clone, too. And participate in the development through github's pull request ]feature and issue tracker.
](Of course, if you want to do this, all this may require some sign-off by your team)
]
]But since that's possible (and really easy, too), there's no need to burden ]coreboot.org with more binaries.
]
]> Understood your point that entire coreboot code must contain source
]> code only. I will share this with inside our team.
]We compromise here and there, but that's not some thing we want to encourage - it is ]really just a compromise, and it's risky to try to push its boundaries.
]
]
]Patrick
]--
-------------- next part --------------
A non-text attachment was scrubbed...
Name: payload.patch
Type: application/octet-stream
Size: 6080 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20150205/0b308106/attachment-0001.obj>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: build-commands.txt
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20150205/0b308106/attachment-0001.txt>
More information about the coreboot
mailing list