[coreboot] Coreboot with Intel FSP on BayleyBay Help

[Sean McNeil]

Coreboot and FSP are not as easy to understand as you can see. I also 
would suggest that you seek assistance from either Sage (who has good 
experience that I understand serves the USA and Europe markets and 
contributed the current Coreboot+FSP code) or perhaps a company in Asia 
such as Zien Solutions (of Vietnam). There are a number of issues that 
you are failing to understand:

1) As stated, the first serial port is actually connected to a 
USB->Serial converter and delivered out of the microUSB connector on the 
CRB.
2) You need to configure the FSP with Intels program to create a ROMable 
image and not use the .fd file directly.
3) BayleyBay needs to be configured for non-ECC RAM whereas Bakersport 
needs to be configured for ECC.
4) You don't necessarily need the TXE security module, but you could 
very well cause problems if it is partially overwritten. Best is to 
create a correct 8MB image to flash that has the proper Intel Firmware 
Description block at the beginning.

Regards,
Sean

On 11/02/2014 02:25 AM, Gaumless via coreboot wrote:
> First, the serial ports:  The serial console is on the first serial port on the micro-USB connection.
>
> The 0x0000 on the post code display means that it's not actually starting to boot - it's probably hanging in the TXE.  There are known issues with upgrading to coreboot from some of the bayleybay roms.  I thought Intel was going to document that, but I don't know if they did.
>
> The Gold 2 FSP doesn't support D0 parts, so if you have a D0, you need the Gold 3.  Also, the FSP is targeted at the embedded sku Baytrail-I.  It might work with M/D parts, I haven't tested that.
>
> Assuming all that is ok, you probably need to start from a different rom.  It might be failing because of the TXE security.  You'll probably need to talk to your Intel contact to get that update.
>
> Finally, if this is not a personal project, you might be interested in contacting Sage and look at purchasing a BSP to get up and running.  Either way, let us know whether you make progress or need more help.
>
> Martin
>
>
>> On Nov 1, 2014, at 11:48 AM, Gailu Singh via coreboot <coreboot at coreboot.org> wrote:
>>
>> Hi Experts,
>>
>> I am trying to boot BayleyBay CRB Rev 3 using coreboot and have no success so far. I have serial port (DB9) connected and using 115200 Baud Rate. No message comes on serial at all. Here is the procedure I followed.
>>
>> 1. Pulled latest coreboot from git.
>> 2. Pulled following from BAY_TRAIL_FSP_KIT. The reason for doing it is that  BAYTRAIL_FSP.fd is not in git and .config refers to it. Also .config refers to ../intel/cpu/baytrail/microcode
>>      a) created intel directory parallel to coreboot and copied BAYTRAIL_FSP_GOLD_002_10-JANUARY-2014.fd in to intel/fsp/baytrail/BAYTRAIL_FSP.fd
>>      b) Copied *.h from Microcode folder in the kit to intel/cpu/baytrail/microcode.
>> 3. Configured the coreboot for mainboard as intel bayleybay. My .config is attached.
>> 4. Build Coreboot. Below is the prints from cbfstool.
>> cmos_layout.bin                0x0        cmos_layout  1132
>> fallback/romstage              0x4c0      stage        27813
>> fallback/ramstage              0x71c0     stage        67431
>> fallback/payload               0x17980    payload      268859
>> config                         0x59400    raw          4363
>> (empty)                        0x5a540    null         744088
>> cpu_microcode_blob.bin         0x110000   microcode    104448
>> (empty)                        0x129840   null         157528
>> mrc.cache                      0x14ffc0   (unknown)    65536
>> (empty)                        0x160000   null         393112
>> fsp.bin                        0x1bffc0   (unknown)    229376
>> (empty)                        0x1f8000   null         31640
>> 5. Flashed the coreboot.rom in upper 2MB (0X0600000-0x07FFFFF)
>> 6. Reboot the board
>> 7. Nothing comes on Serial Console (DB9). Also tried to connect Micro usb cable which detects two serial ports but no output to any of them as well.
>> 8. Before flashing coreboot.rom, 4 digit display was displaying something on two digits and rest two were zero. Now all 4 digits stays at zeros.
>>
>> Looking for help to get at least serial working so that I can get some logs to debug it. I do not have copy of original BIOS that was there in Flash and forgot to make a copy using programmer though I ensured that I only touch upper 2MB. I am stuck and have no logs to debug it.
>>
>> Thanks in advance.
>> <my.config>
>> -- 
>> coreboot mailing list: coreboot at coreboot.org
>> http://www.coreboot.org/mailman/listinfo/coreboot