[coreboot] PCI BAR resource problem

WANG Siyuan wangsiyuanbuaa at gmail.com
Thu Mar 6 12:06:42 CET 2014


Hi,
I have a question about assigning PCI BAR resource.
In OliveHill, internal graphics(bus 0, dev 1, func 0)'s BAR0 (base address
register) is 0xe000000c. This is Graphic Memory Base Address.
I want to change this value to 0xc000000c. I have to do 2 things:
1) alloc resource at 0xc0000000 whose length is 512M
2) write the address value to internal graphics(bus 0, dev 1, func 0)'s BAR0

for 1), maybe I can alloc resource when reading resource.
but I don't know how to deal with 2). It seems that, BAR's resources are
assigned by device's ops->set_resources() function. But I can't find this
function.

My question is
1) when internal graphics(bus 0, dev 1, func 0)'s BAR0 is set to
0xe0000000? How can I change it?
2) How does coreboot alloc resources on 0xe0000000? I also can't find it.

This is a general question: how does coreboot assign PCI device's BAR
resource?

Yours sincerely,
WANG Siyuan
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20140306/f174ae9f/attachment.html>


More information about the coreboot mailing list