[coreboot] Ram Init: Intel i945: Timing parameters

Mohit Gupta MGupta at iress.com.au
Fri Feb 14 03:12:01 CET 2014

Thanks Peter once again for helpful information. I was reading code line by line and going through i945 Express chipset document, tried to understand register settings and values. Seems to be tough job writing RAM init, and wouldn't have been possible without any documentation. Don't understand why Intel has made DRAM controller setup/Ram-init documentation NDA, and have made chipset documentation public
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