[coreboot] New patch to review for coreboot: 3f26722 south_station: mptable add GNB internal graphic interrupt
Kerry Sheh (shekairui@gmail.com)
gerrit at coreboot.org
Wed Nov 23 07:32:11 CET 2011
Kerry Sheh (shekairui at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/451
-gerrit
commit 3f26722935da7e5267acc731dc3ca06d04bd9f3d
Author: Kerry Sheh <shekairui at gmail.com>
Date: Wed Nov 23 15:08:36 2011 +0800
south_station: mptable add GNB internal graphic interrupt
Change-Id: Ic7618d80e0432ed0e22d1c16e1adb8ba6cea2e59
Signed-off-by: Kerry Sheh <shekairui at gmail.com>
Signed-off-by: Kerry Sheh <kerry.she at amd.com>
---
src/mainboard/amd/south_station/mptable.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c
index a3b4b5c..9f3e02c 100644
--- a/src/mainboard/amd/south_station/mptable.c
+++ b/src/mainboard/amd/south_station/mptable.c
@@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v)
#define PCI_INT(bus, dev, fn, pin)
#endif
+ /* Internal VGA */
+ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]);
+ PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]);
+
//PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */
PCI_INT(0x0, 0x14, 0x0, 0x10);
- /* HD Audio: */
+ /* Southbridge HD Audio: */
PCI_INT(0x0, 0x14, 0x2, 0x12);
PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */
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