[coreboot] New patch to review for coreboot: 6fcc2b5 south_station: apic interrupt routing update

[Kerry Sheh (shekairui@gmail.com)]

Kerry Sheh (shekairui at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/452

-gerrit

commit 6fcc2b506dce063cde6cdd0c18b7d580c248ed05
Author: Kerry Sheh <shekairui at gmail.com>
Date:   Wed Nov 23 15:08:51 2011 +0800

    south_station: apic interrupt routing update
    
    Change-Id: I4b6e0fce8d34637c03de8ebfdadea008c98e193b
    Signed-off-by: Kerry Sheh <shekairui at gmail.com>
    Signed-off-by: Kerry Sheh <kerry.she at amd.com>
---
 src/mainboard/amd/south_station/acpi/routing.asl |   59 ++++++++++++---------
 1 files changed, 34 insertions(+), 25 deletions(-)

diff --git a/src/mainboard/amd/south_station/acpi/routing.asl b/src/mainboard/amd/south_station/acpi/routing.asl
index cb50394..d7e4687 100644
--- a/src/mainboard/amd/south_station/acpi/routing.asl
+++ b/src/mainboard/amd/south_station/acpi/routing.asl
@@ -31,22 +31,28 @@ Scope(\_SB) {
 		/* NB devices */
 		/* Bus 0, Dev 0 - RS780 Host Controller */
 		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
+		Package(){0x0001FFFF, 0, INTC, 0 },
+		Package(){0x0001FFFF, 1, INTD, 0 },
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
 		Package(){0x0002FFFF, 0, INTC, 0 },
 		Package(){0x0002FFFF, 1, INTD, 0 },
 		Package(){0x0002FFFF, 2, INTA, 0 },
 		Package(){0x0002FFFF, 3, INTB, 0 },
 		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
+		Package(){0x0003FFFF, 0, INTD, 0 },
+		Package(){0x0003FFFF, 1, INTA, 0 },
+		Package(){0x0003FFFF, 2, INTB, 0 },
+		Package(){0x0003FFFF, 3, INTC, 0 },
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
 		Package(){0x0004FFFF, 0, INTA, 0 },
 		Package(){0x0004FFFF, 1, INTB, 0 },
 		Package(){0x0004FFFF, 2, INTC, 0 },
 		Package(){0x0004FFFF, 3, INTD, 0 },
 		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Package(){0x0005FFFF, 0, INTB, 0 }, */
-		/* Package(){0x0005FFFF, 1, INTC, 0 }, */
-		/* Package(){0x0005FFFF, 2, INTD, 0 }, */
-		/* Package(){0x0005FFFF, 3, INTA, 0 }, */
+		Package(){0x0005FFFF, 0, INTB, 0 },
+		Package(){0x0005FFFF, 1, INTC, 0 },
+		Package(){0x0005FFFF, 2, INTD, 0 },
+		Package(){0x0005FFFF, 3, INTA, 0 },
 		/* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
 		Package(){0x0006FFFF, 0, INTC, 0 },
 		Package(){0x0006FFFF, 1, INTD, 0 },
@@ -126,41 +132,44 @@ Scope(\_SB) {
 
 		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
 		Package(){0x0003FFFF, 0, 0, 19 },
+		Package(){0x0003FFFF, 1, 0, 16 },
+		Package(){0x0003FFFF, 2, 0, 17 },
+		Package(){0x0003FFFF, 3, 0, 18 },
 
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
 		Package(){0x0004FFFF, 0, 0, 16 },
-		/* Package(){0x0004FFFF, 1, 0, 17 }, */
-		/* Package(){0x0004FFFF, 2, 0, 18 }, */
-		/* Package(){0x0004FFFF, 3, 0, 19 }, */
+		Package(){0x0004FFFF, 1, 0, 17 },
+		Package(){0x0004FFFF, 2, 0, 18 },
+		Package(){0x0004FFFF, 3, 0, 19 },
 
 		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		/* Package(){0x0005FFFF, 0, 0, 17 }, */
-		/* Package(){0x0005FFFF, 1, 0, 18 }, */
-		/* Package(){0x0005FFFF, 2, 0, 19 }, */
-		/* Package(){0x0005FFFF, 3, 0, 16 }, */
+		Package(){0x0005FFFF, 0, 0, 17 },
+		Package(){0x0005FFFF, 1, 0, 18 },
+		Package(){0x0005FFFF, 2, 0, 19 },
+		Package(){0x0005FFFF, 3, 0, 16 },
 
 		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		/* Package(){0x0006FFFF, 0, 0, 18 }, */
-		/* Package(){0x0006FFFF, 1, 0, 19 }, */
-		/* Package(){0x0006FFFF, 2, 0, 16 }, */
-		/* Package(){0x0006FFFF, 3, 0, 17 }, */
+		Package(){0x0006FFFF, 0, 0, 18 },
+		Package(){0x0006FFFF, 1, 0, 19 },
+		Package(){0x0006FFFF, 2, 0, 16 },
+		Package(){0x0006FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		/* Package(){0x0007FFFF, 0, 0, 19 }, */
-		/* Package(){0x0007FFFF, 1, 0, 16 }, */
-		/* Package(){0x0007FFFF, 2, 0, 17 }, */
-		/* Package(){0x0007FFFF, 3, 0, 18 }, */
+		Package(){0x0007FFFF, 0, 0, 19 },
+		Package(){0x0007FFFF, 1, 0, 16 },
+		Package(){0x0007FFFF, 2, 0, 17 },
+		Package(){0x0007FFFF, 3, 0, 18 },
 
 		/* Bus 0, Dev 9 - PCIe Bridge for network card */
 		Package(){0x0009FFFF, 0, 0, 17 },
-		/* Package(){0x0009FFFF, 1, 0, 16 }, */
-		/* Package(){0x0009FFFF, 2, 0, 17 }, */
-		/* Package(){0x0009FFFF, 3, 0, 18 }, */
+		Package(){0x0009FFFF, 1, 0, 16 },
+		Package(){0x0009FFFF, 2, 0, 17 },
+		Package(){0x0009FFFF, 3, 0, 18 },
 		/* Bus 0, Dev A - PCIe Bridge for network card */
 		Package(){0x000AFFFF, 0, 0, 18 },
-		/* Package(){0x000AFFFF, 1, 0, 16 }, */
-		/* Package(){0x000AFFFF, 2, 0, 17 }, */
-		/* Package(){0x000AFFFF, 3, 0, 18 }, */
+		Package(){0x000AFFFF, 1, 0, 16 },
+		Package(){0x000AFFFF, 2, 0, 17 },
+		Package(){0x000AFFFF, 3, 0, 18 },
 		/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
 
 		/* SB devices in APIC mode */