[coreboot] unstable AMD Fam10h boot
rminnich at gmail.com
Sun Sep 6 21:52:48 CEST 2009
On Tue, Sep 1, 2009 at 2:15 PM, Ralf Grosse Boerger<ralfgb at gmail.com> wrote:
> this a reply to the following message:
> [I am not subscribed to this list.]
> The sporadic boot problems ("FIXME! CPU Version unknown or not supported!")
> are caused by a race condition in Get_NB32().
> This function performs a read operation to the PCI configuration space via
> port CF8/CFC.
> u32 Get_NB32(u32 dev, u32 reg)
> u32 addr;
> addr = (dev>>4) | (reg & 0xFF) | ((reg & 0xf00)<<16);
> outl((1<<31) | (addr & ~3), 0xcf8);
> return inl(0xcfc);
> As ports CF8/CFC are shared across cores (maybe even sockets?) concurrent
> accesses from different cores may yield random results.
OK, let's start this discussion again.
Can we at least answer this question. Ports CF8/CFC are shared across
I am betting they are not shared across sockets, and would be
surprised if they are shared across cores but am
willing to believe it.
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