[coreboot] locking...

Stefan Reinauer stepan at coresystems.de
Fri Jun 19 19:53:37 CEST 2009


ron minnich wrote:
> On Fri, Jun 19, 2009 at 9:50 AM, Myles Watson<mylesgw at gmail.com> wrote:
>   
>>> yes, that is why I did that struct-based stack in my v3 SMP startup.
>>> The struct formed the base of the AP stack. We could put a simple
>>> print buffer in there and require that the BSP print out AP boot
>>> messages.
>>>       
>> So each AP has some part of RAM to copy the buffer to?
>>     
>
> the way SMP works, the BSP sets up its ram. At that point, the APs can
> use the BSP ram. That's why APs have a stack in the first place.
>
> APs have a working stack when they are setting up their own RAM.
>   
The way this works on amd64 is that the AP comes up, goes to cache as
ram, finds it is an AP and goes to sleep again.
Then it wakes up again in stage2 when the BSP sends an IPI. At this
point (at least remote) RAM is available. They never set up their own
ram (in terms of Jedec init, or setting up a ram controller), but only
have to clear it, in case of ECC memory.

Stefan

-- 
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.dehttp://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866





More information about the coreboot mailing list