[coreboot] MTRR setup strategy
rminnich at gmail.com
Sat Jan 24 20:49:31 CET 2009
On Sat, Jan 24, 2009 at 11:46 AM, Stefan Reinauer <stepan at coresystems.de> wrote:
>> This sounds neat, we're going to need it. An interesting test for now
>> would be to artificially limit memory size to that which can be
>> described with 4 MTRRs. We would lose 200M or so that way but it would
>> be helpful to see if that resolves the speed problem.
> How would we lose 200M? The above example only requires 3 MTRRs?
I was not clear. What I meant was that we could test the 'it's an mtrr
problem' assertion by using 3 MTRRs for positive decoding of most of
memory, but not the last little bit,and then reporting that we only
have that memory covered by MTRRs.
put another way: simple test: hardwire TOM to 1 GB, and see if booting
gets better, since one MTRR will cover that.
What do MTRRs look like on this board on factory BIOS?
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