[coreboot] r1097 - in coreboot-v3: . device

svn at coreboot.org svn at coreboot.org
Mon Jan 5 23:57:46 CET 2009


Author: myles
Date: 2009-01-05 23:57:45 +0100 (Mon, 05 Jan 2009)
New Revision: 1097

Modified:
   coreboot-v3/Kconfig
   coreboot-v3/device/Kconfig
   coreboot-v3/device/Makefile
   coreboot-v3/device/pci_device.c
Log:
This patch introduces {PCIX,PCIE,AGP...}_SUPPORT config variables.

Kconfig:
       Add *_SUPPORT variables.
       Add select statements for the hardware that needs them.

device/Makefile:
       Test *_SUPPORT variables instead of chip names.

device/Kconfig:
       Add *_PLUGIN_SUPPORT variables.

device/pci_device.c:
       Conditionally include headers if *_PLUGIN_SUPPORT.
       Update default drivers to depend on CONFIG_*_PLUGIN_SUPPORT.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: coreboot-v3/Kconfig
===================================================================
--- coreboot-v3/Kconfig	2009-01-05 22:13:49 UTC (rev 1096)
+++ coreboot-v3/Kconfig	2009-01-05 22:57:45 UTC (rev 1097)
@@ -93,10 +93,23 @@
 
 # These are used for internal purposes only:
 
+# Buses:
+config PCIX_SUPPORT
+	boolean
+config PCIE_SUPPORT
+	boolean
+config HYPERTRANSPORT_SUPPORT
+	boolean
+config AGP_SUPPORT
+	boolean
+config CARDBUS_SUPPORT
+	boolean
+
 # Northbridges:
 config NORTHBRIDGE_AMD_GEODELX
 	boolean
 config NORTHBRIDGE_AMD_K8
+	select HYPERTRANSPORT_SUPPORT
 	boolean
 config NORTHBRIDGE_INTEL_I440BXEMULATION
 	boolean
@@ -111,10 +124,13 @@
 config SOUTHBRIDGE_INTEL_I82371EB
 	boolean
 config SOUTHBRIDGE_NVIDIA_MCP55
+	select PCIE_SUPPORT
 	boolean
 config SOUTHBRIDGE_AMD_AMD8151
+	select AGP_SUPPORT
 	boolean
 config SOUTHBRIDGE_AMD_AMD8132
+	select PCIX_SUPPORT
 	boolean
 config SOUTHBRIDGE_AMD_AMD8111
 	boolean

Modified: coreboot-v3/device/Kconfig
===================================================================
--- coreboot-v3/device/Kconfig	2009-01-05 22:13:49 UTC (rev 1096)
+++ coreboot-v3/device/Kconfig	2009-01-05 22:57:45 UTC (rev 1097)
@@ -125,6 +125,45 @@
 
 endmenu
 
+menu "Plugin Support"
+
+config PCIX_PLUGIN_SUPPORT
+	bool "Support for devices that provide PCI-X and aren't in the dts."
+	select PCIX_SUPPORT
+	default false
+	help
+	  Compile in the drivers for cards that provide PCI-X.
+
+config PCIE_PLUGIN_SUPPORT
+	bool "Support for devices that provide PCI-e and aren't in the dts."
+	select PCIE_SUPPORT
+	default false
+	help
+	  Compile in the drivers for cards that provide PCI-e.
+
+config HYPERTRANSPORT_PLUGIN_SUPPORT
+	bool "Support for devices that provide HT and aren't in the dts."
+	select HYPERTRANSPORT_SUPPORT
+	default false
+	help
+	  Compile in the drivers for cards that provide HT.
+
+config AGP_PLUGIN_SUPPORT
+	bool "Support for devices that provide AGP and aren't in the dts."
+	select AGP_SUPPORT
+	default false
+	help
+	  Compile in the drivers for cards that provide AGP.
+
+config CARDBUS_PLUGIN_SUPPORT
+	bool "Support for devices that provide Cardbus and aren't in the dts."
+	select CARDBUS_SUPPORT
+	default false
+	help
+	  Compile in the drivers for cards that provide Cardbus.
+
+endmenu
+
 menu "Power management"
 
 config SUSPEND_TO_RAM

Modified: coreboot-v3/device/Makefile
===================================================================
--- coreboot-v3/device/Makefile	2009-01-05 22:13:49 UTC (rev 1096)
+++ coreboot-v3/device/Makefile	2009-01-05 22:57:45 UTC (rev 1097)
@@ -28,27 +28,23 @@
 		    pci_device.c pci_ops.c pci_rom.c pnp_device.c pnp_raw.c \
 			smbus_ops.c
 
-# this is only needed on the K8
-# This could also check for CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
-ifeq ($(CONFIG_NORTHBRIDGE_AMD_K8),y)
+ifeq ($(CONFIG_HYPERTRANSPORT_SUPPORT),y)
 STAGE2_DEVICE_SRC += hypertransport.c
 endif
 
-# this is only needed for pcix devices
-# This should also check for CONFIG_PCIX_PLUGIN_SUPPORT
-ifeq ($(CONFIG_SOUTHBRIDGE_AMD_AMD8132),y)
+ifeq ($(CONFIG_PCIX_SUPPORT),y)
 STAGE2_DEVICE_SRC += pcix_device.c
 endif
 
-ifeq ($(CONFIG_PCIE_PLUGIN_SUPPORT),y)
+ifeq ($(CONFIG_PCIE_SUPPORT),y)
 STAGE2_DEVICE_SRC += pcie_device.c
 endif
 
-ifeq ($(CONFIG_CARDBUS_PLUGIN_SUPPORT),y)
+ifeq ($(CONFIG_CARDBUS_SUPPORT),y)
 STAGE2_DEVICE_SRC += cardbus_device.c
 endif
 
-ifeq ($(CONFIG_AGP_PLUGIN_SUPPORT),y)
+ifeq ($(CONFIG_AGP_SUPPORT),y)
 STAGE2_DEVICE_SRC += agp_device.c
 endif
 

Modified: coreboot-v3/device/pci_device.c
===================================================================
--- coreboot-v3/device/pci_device.c	2009-01-05 22:13:49 UTC (rev 1096)
+++ coreboot-v3/device/pci_device.c	2009-01-05 22:57:45 UTC (rev 1097)
@@ -32,6 +32,22 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 
+#ifdef CONFIG_PCIX_PLUGIN_SUPPORT
+#include <device/pcix.h>
+#endif
+#ifdef CONFIG_AGP_PLUGIN_SUPPORT
+#include <device/agp.h>
+#endif
+#ifdef CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
+#include <device/hypertransport.h>
+#endif
+#ifdef CONFIG_PCIE_PLUGIN_SUPPORT
+#include <device/pcie.h>
+#endif
+#ifdef CONFIG_CARDBUS_PLUGIN_SUPPORT
+#include <device/cardbus.h>
+#endif
+
 #include <statictree.h>
 
 u8 pci_moving_config8(struct device *dev, unsigned int reg)
@@ -776,7 +792,7 @@
  */
 static const struct device_operations *get_pci_bridge_ops(struct device *dev)
 {
-#ifdef DEVICE_PCIX_H
+#ifdef CONFIG_PCIX_PLUGIN_SUPPORT
 	unsigned int pcix_pos;
 	pcix_pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
 	if (pcix_pos) {
@@ -785,12 +801,12 @@
 		return &default_pcix_ops_bus;
 	}
 #endif
-#ifdef DEVICE_AGP_H
+#ifdef CONFIG_AGP_PLUGIN_SUPPORT
 	/* How do I detect an PCI to AGP bridge? */
 #warning AGP detection not implemented, so AGP bridge plugin not supported.
 
 #endif
-#ifdef DEVICE_HYPERTRANSPORT_H
+#ifdef CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
 	unsigned int ht_pos;
 	ht_pos = 0;
 	while ((ht_pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, ht_pos))) {
@@ -805,7 +821,7 @@
 		}
 	}
 #endif
-#ifdef DEVICE_PCIE_H
+#ifdef CONFIG_PCIE_PLUGIN_SUPPORT
 	unsigned int pcie_pos;
 	pcie_pos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
 	if (pcie_pos) {
@@ -881,7 +897,7 @@
 		else
 			dev->ops = get_pci_bridge_ops(dev);
 		break;
-#ifdef DEVICE_CARDBUS_H
+#ifdef CONFIG_CARDBUS_PLUGIN_SUPPORT
 	case PCI_HEADER_TYPE_CARDBUS:
 		dev->ops = &default_cardbus_ops_bus;
 		break;





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