[coreboot] r1096 - coreboot-v3/southbridge/nvidia/mcp55
svn at coreboot.org
svn at coreboot.org
Mon Jan 5 23:13:49 CET 2009
Author: myles
Date: 2009-01-05 23:13:49 +0100 (Mon, 05 Jan 2009)
New Revision: 1096
Modified:
coreboot-v3/southbridge/nvidia/mcp55/lpc.c
coreboot-v3/southbridge/nvidia/mcp55/smbus.c
coreboot-v3/southbridge/nvidia/mcp55/stage1.c
Log:
This patch removes a couple of warnings from the compilation of mcp55 boards.
* #if CONFIG_HPET -> #ifdef CONFIG_HPET
* unused variables
Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>
Modified: coreboot-v3/southbridge/nvidia/mcp55/lpc.c
===================================================================
--- coreboot-v3/southbridge/nvidia/mcp55/lpc.c 2009-01-05 17:41:55 UTC (rev 1095)
+++ coreboot-v3/southbridge/nvidia/mcp55/lpc.c 2009-01-05 22:13:49 UTC (rev 1096)
@@ -157,7 +157,7 @@
lpc_common_init(dev, 0);
}
-#if CONFIG_HPET
+#ifdef CONFIG_HPET
static void enable_hpet(struct device *dev)
{
unsigned long hpet_address;
Modified: coreboot-v3/southbridge/nvidia/mcp55/smbus.c
===================================================================
--- coreboot-v3/southbridge/nvidia/mcp55/smbus.c 2009-01-05 17:41:55 UTC (rev 1095)
+++ coreboot-v3/southbridge/nvidia/mcp55/smbus.c 2009-01-05 22:13:49 UTC (rev 1096)
@@ -104,7 +104,6 @@
static void mcp55_sm_read_resources(struct device *dev)
{
- struct resource *res;
unsigned long index;
/* Get the normal pci resources of this device */
Modified: coreboot-v3/southbridge/nvidia/mcp55/stage1.c
===================================================================
--- coreboot-v3/southbridge/nvidia/mcp55/stage1.c 2009-01-05 17:41:55 UTC (rev 1095)
+++ coreboot-v3/southbridge/nvidia/mcp55/stage1.c 2009-01-05 22:13:49 UTC (rev 1096)
@@ -472,7 +472,6 @@
void sio_setup(u32 devn)
{
- unsigned value;
u32 dword;
u8 byte;
@@ -489,4 +488,3 @@
pci_conf1_write_config32(PCI_BDF(0, devn+1 , 0), 0xa4, dword);
}
-
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