[coreboot] [PATCH] Halt TCO timer on Intel 3100 chipset

[Uwe Hermann]

On Sat, Mar 29, 2008 at 12:07:36AM -0700, Ed Swierk wrote:
> Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots
> the system automatically unless software resets the timer
> periodically. The extra reboot extends boot time by several seconds.
> 
> The attached patch adds a function to the Intel 3100 southbridge code
> that halts the TCO timer, thus preventing this extra reboot, and calls
> the function early in the boot process on the Mt. Arvon board.
> 
> It also fixes a bug in the LPC device initialization--the ACPI BAR
> enable flag is bit 7, not bit 4.
> 
> Signed-off-by: Ed Swierk <eswierk at arastra.com>

Looks good, thanks. Committed in r3198.


> Index: coreboot-v2-3189/src/southbridge/intel/i3100/i3100_early_lpc.c
> ===================================================================
> --- coreboot-v2-3189.orig/src/southbridge/intel/i3100/i3100_early_lpc.c
> +++ coreboot-v2-3189/src/southbridge/intel/i3100/i3100_early_lpc.c
> @@ -30,3 +30,23 @@ static void i3100_enable_superio(void)
>  	/* Enable decoding of I/O locations for SuperIO devices */
>  	pci_write_config16(dev, 0x82, 0x340f);
>  }
> +
> +static void i3100_halt_tco_timer(void)
> +{
> +	device_t dev;
> +	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
> +				       PCI_DEVICE_ID_INTEL_3100_LPC), 0);
> +	if (dev == PCI_DEV_INVALID) {
> +		die("LPC bridge not found\r\n");
> +	}

If you feel bored one of these days, please post a patch to remove the
unneeded pci_locate_device() stuff from all of i3100 (and also other
chipsets if you're inclined), as discussed in another thread.
Those checks are not needed, as no non-i3100 boards should call those
functions anyway...


Uwe.
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