[coreboot] [LinuxBIOS] Intel refactoring and microcode updates

Uwe Hermann uwe at hermann-uwe.de
Mon Jan 21 21:05:17 CET 2008

On Mon, Jan 14, 2008 at 03:29:51PM +0100, Uwe Hermann wrote:
> On Mon, Jan 14, 2008 at 05:46:29AM -0500, Corey Osgood wrote:
> > I know ;) Uwe, do you have a 440bx board you can try this on? Mine has
> Yep, will do.

OK, here's my status report, there seem to be some issues.

I tried the current svn on my ASUS P2B-F, works fine. Then I applied the
microcode patches and tried to rebuild.

First issue is that I cannot rebuild anymore, linker errors because the
code became bigger.

The default in Options.lb is 
  default ROM_IMAGE_SIZE = 64 * 1024
and I had to change the size (in targets/.../Config.lb) to '74 * 1024'
in order to fit the increased size. Maybe some smaller value will
also work, but '70 * 1024' didn't, so you need something between
70 KB and 74 KB. Before the patches, 64 KB was enough.

The image finally built fine with 74 KB, but didn't boot anymore. It
hangs upon the 'Jumping to coreboot' message. Not sure why.

I noticed that the slot_1 directory now includes some HT stuff, in
there's now
  dir /cpu/intel/hyperthreading
which wasn't there in the old slot_1 code (slot_2 actually), I think.

But that doesn't seem to be the (only) problem, commenting the
  # dir /cpu/intel/hyperthreading
doesn't help. I tried setting
in the Options.lb and it _seems_ that helped, it's booting again.
But of course it doesn't apply the microcode updates in that case.

My test CPU was
  CPU: family 06, model 07, stepping 03

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