[coreboot] problem about ioapic

aaron lwe aaron.lwe at gmail.com
Mon Apr 21 05:49:02 CEST 2008


On Sat, Apr 19, 2008 at 1:37 PM, aaron lwe <aaron.lwe at gmail.com> wrote:
 >
 > On Sat, Apr 19, 2008 at 5:01 AM, Rudolf Marek <r.marek at assembler.cz> wrote:
 >  > Hi,
 >  >
 >  >  What northbridge it is? I think you need two things:
 >  >
 >  >         /* Set APIC to FSB message bus. */
 >  >         l[0] = 0x3;
 >  >         val = l[4];
 >  >         l[4] = (val & 0xFFFFFE) | 1;
 >  >
 >  >  (this is in the vt8237r_lpc.c) so If you use this you should be safe.
 >  >
 >  >  Second thing you need is to route the APIC messages through chipset
 >  > correctly.
 >  >  I think this is D0F7/D11F7 0x7c bit 3. In fact you need to have correct
 >  > values there for the whole 0x70-0x7f range.
 >  >
 >  >  Also, it seems you will need some timer overrides:
 >  >
 >  >       /* IRQ0 -> APIC IRQ2. */
 >  >         current +=
acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 >  >                                                 current, 0, 0, 2, 0x0);
 >  >
 >  >  Thanks,
 >  >
 >  >  Rudolf
 >  >
 >
 >  The northbridge is CN700. I'll try this on Monday, thanks.
 >

 Hi,

 I've programmed CN700 D0F7 Rx70-7F with the factory BIOS value, but
 the problem remained.
 And I've tried both to use acpi madt table(when acpi enabled) and
 mptable(when acpi off), so I
 guess it shouldn't be a configuration tables's problem.

 The CN700 D0F7 Rx7c's value is 0 and it's not mentioned on the
 datasheet, and there is no D11F7
 on VT8237R, I wonder if I misunderstood your meaning?

 Thanks




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