Delay in copying Linuxbios to ram

Steve Gehlbach steve at
Fri Apr 25 13:17:00 CEST 2003

> I have the same delay problem on VIA EPIA board.
> It didn't run with biosbase set to 0xffff0000 (hangs after first banner,
> and I don't have a POST card to track it down).

Not surprising, some implementations depend on executing at 0xf0000.  If 
the serial port is working, you can put in prints etc and track it down 
without a POST card.

> In cpu/p6/, 0xf0000-0xfffff is left uncached.
> (Only 0-640KB is cached, 640KB-1M is uncached)
> I will try adding code there to set fixed MTRR for 0xf0000-0xfffff
> WP caching.
> It should be harmless for other boards that do not need this,
> what do you think?

Not sure.  Need to see if the RAM is turned on for this region later 
after the C-code starts, if so, then the cache memory type may have to 
be changed from WP to normal.


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