[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Add ASL helper for AOAC PwrGood Control

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/28771 )

Change subject: amd/stoneyridge: Add ASL helper for AOAC PwrGood Control
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/28771/1/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
File src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl:

https://review.coreboot.org/#/c/28771/1/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl@642
PS1, Line 642: 
> Not very clear. Apparently this code only executes something (HW wise) if Arg0 is bit5.
I agree.  I'd meant to go back and figure out what AMD was trying to say, and forgot to.  Looks like

  /*
   * Helper...
   * Arg0: bit to set or clear
   * Arg1: 0: clear bit[Arg0], non-0: set bit[Arg0]
   */



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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: Ief602c4bc42d27b3e236d24db815b990f3a2419c
Gerrit-Change-Number: 28771
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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