[coreboot-gerrit] Change in coreboot[master]: mb/google/nocturne: Define GPP_D17 as EC_SYNC_IRQ

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/28759


Change subject: mb/google/nocturne: Define GPP_D17 as EC_SYNC_IRQ
......................................................................

mb/google/nocturne: Define GPP_D17 as EC_SYNC_IRQ

Use GPIO GPP_D17 pin as the EC sync interrupt and provide this value
to the embedded controller to be exported to the OS.

This interface was tested on a reworked Nocturne board with modified
EC and a modified kernel driver to ensure that the interrupt asserts
as expected and can be used by the kernel driver.

Change-Id: Ie2b33692367b5d9ecc2b128180d8cfe4f6b347b1
Signed-off-by: Duncan Laurie <dlaurie at google.com>
---
M src/mainboard/google/poppy/variants/nocturne/gpio.c
M src/mainboard/google/poppy/variants/nocturne/include/variant/ec.h
M src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
3 files changed, 7 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/28759/1

diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index 15a97c3..99b2dcf 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -196,7 +196,7 @@
 	/* D16 : ISH_UART0_CTS# ==> RCAM_RST_L */
 	PAD_CFG_GPO(GPP_D16, 0, DEEP),
 	/* D17 : DMIC_CLK1 ==> EC_PCH_ARCORE_INT_L */
-	PAD_CFG_NC(GPP_D17),
+	PAD_CFG_GPI_APIC(GPP_D17, NONE, PLTRST),
 	/* D18 : DMIC_DATA1 ==> TP131 */
 	PAD_CFG_NC(GPP_D18),
 	/* D19 : DMIC_CLK0 ==> PCH_DMIC_CLK_OUT */
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/ec.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/ec.h
index 7e16801..ba481e4 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/ec.h
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/ec.h
@@ -79,4 +79,7 @@
 #define EC_ENABLE_MKBP_DEVICE  /* Enable cros_ec_keyb device */
 #define EC_ENABLE_CBAS_DEVICE  /* Enable "Base Attached Switch" device */
 
+/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in variant/gpio.h */
+#define EC_ENABLE_SYNC_IRQ
+
 #endif /* __MAINBOARD_EC_H__ */
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
index 0853893..fb7ad1a 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
@@ -34,6 +34,9 @@
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK
 
+/* EC sync irq is GPP_D12 */
+#define EC_SYNC_IRQ		GPP_D17_IRQ
+
 /* eSPI virtual wire reporting */
 #define EC_SCI_GPI		GPE0_ESPI
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie2b33692367b5d9ecc2b128180d8cfe4f6b347b1
Gerrit-Change-Number: 28759
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
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