[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge/gpio.c: Create I2C slave reset code

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28572


Change subject: soc/amd/stoneyridge/gpio.c: Create I2C slave reset code
......................................................................

soc/amd/stoneyridge/gpio.c: Create I2C slave reset code

AMD soc does not wait for I2C transaction to complete before executing a
reset. Because of this, it's possible for the reset to happen in the middle
of a transaction, resulting on a slave hang. There are 2 possible solutions:
If the slave has a reset pin connected to a GPIO pin, it can be used to
reset the slave, else the only solution is to bang SCL 9 times. Create code
that makes it easy to implement either solution.

BUG=b:114479395
TEST=Build and boot grunt.

Change-Id: I9a0bc00c55ecc8ec660c74794bee48302663e72b
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/soc/amd/stoneyridge/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/28572/1

diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index d846315..1da7ab4 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -349,7 +349,7 @@
 	}
 
 	remain = 1; /* at least 1 pin needs to be toggled */
-	while(remain) {
+	while (remain) {
 		for (i = 0; i < j; i++) {
 			if (control_table[i].count) {
 				reg32 = read32(control_table[i].ptr);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9a0bc00c55ecc8ec660c74794bee48302663e72b
Gerrit-Change-Number: 28572
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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