[coreboot-gerrit] Change in coreboot[master]: riscv: add physical memory protection (PMP) support

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28569 )

Change subject: riscv: add physical memory protection (PMP) support
......................................................................


Patch Set 4:

(4 comments)

https://review.coreboot.org/#/c/28569/4/src/arch/riscv/pmp.c
File src/arch/riscv/pmp.c:

https://review.coreboot.org/#/c/28569/4/src/arch/riscv/pmp.c@24
PS4, Line 24: /* 
trailing whitespace


https://review.coreboot.org/#/c/28569/4/src/arch/riscv/pmp.c@32
PS4, Line 32:          * When generating a TOR type configuration,
code indent should use tabs where possible


https://review.coreboot.org/#/c/28569/4/src/arch/riscv/pmp.c@34
PS4, Line 34: 	 * used to record the value of pmpaddr[i - 1] 
trailing whitespace


https://review.coreboot.org/#/c/28569/4/src/arch/riscv/pmp.c@35
PS4, Line 35:          */
code indent should use tabs where possible



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I2e9e0c94e6518f63ade7680a3ce68bacfae219d4
Gerrit-Change-Number: 28569
Gerrit-PatchSet: 4
Gerrit-Owner: Xiang Wang <wxjstz at 126.com>
Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philipp Hug <philipp at hug.cx>
Gerrit-Reviewer: Shawn Chang <citypw at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 11 Sep 2018 14:23:18 +0000
Gerrit-HasComments: Yes
Gerrit-HasLabels: No
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