[coreboot-gerrit] Change in coreboot[master]: intel/basecode/fw_upadte: Add ELOG events to ucode update
Rizwan Qureshi (Code Review)
gerrit at coreboot.org
Tue Oct 30 14:36:19 CET 2018
Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/29357
Change subject: intel/basecode/fw_upadte: Add ELOG events to ucode update
......................................................................
intel/basecode/fw_upadte: Add ELOG events to ucode update
Add ELOG entries for ucode update module.
TEST=verified that the eventlog shows event 0xb2
1 | 2018-10-30 06:06:52 | System boot | 161
2 | 2018-10-30 06:06:52 | Unknown | 0xb2
3 | 2018-10-30 06:07:09 | System boot | 162
Change-Id: Idda32a1073b3dc8e3f57e079b69fc415a2837899
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
M src/include/elog.h
M src/soc/intel/common/basecode/fw_update/Makefile.inc
A src/soc/intel/common/basecode/fw_update/elog.c
A src/soc/intel/common/basecode/fw_update/elog.h
M src/soc/intel/common/basecode/fw_update/ucode_update.c
5 files changed, 76 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/29357/1
diff --git a/src/include/elog.h b/src/include/elog.h
index 8aecf2c..49e2dd4 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -152,6 +152,7 @@
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_2 0x1d
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_3 0x1e
#define ELOG_WAKE_SOURCE_PME_WIFI 0x1f
+#define ELOG_UCODE_UPDATE 0x20
struct elog_event_data_wake {
u8 source;
@@ -231,6 +232,17 @@
u32 event_complement;
} __packed;
+/* Microcode Update events */
+#define ELOG_TYPE_INTEL_UCODE_UPDATE 0xb2
+#define ELOG_INTEL_UCODE_UPDATE_FAIL -1
+#define ELOG_INTEL_UCODE_UPDATE_PASS 0
+struct elog_event_intel_ucode {
+ u32 uc_current;
+ u32 uc_slot;
+ u32 uc_staging;
+ int status;
+} __packed;
+
#if IS_ENABLED(CONFIG_ELOG)
/* Eventlog backing storage must be initialized before calling elog_init(). */
extern int elog_init(void);
diff --git a/src/soc/intel/common/basecode/fw_update/Makefile.inc b/src/soc/intel/common/basecode/fw_update/Makefile.inc
index f58961b..5631e00 100644
--- a/src/soc/intel/common/basecode/fw_update/Makefile.inc
+++ b/src/soc/intel/common/basecode/fw_update/Makefile.inc
@@ -1 +1,2 @@
ramstage-$(CONFIG_TOP_SWAP_BASED_VBOOT_UCODE_UPDATE) += ucode_update.c
+ramstage-$(CONFIG_TOP_SWAP_BASED_VBOOT_UCODE_UPDATE) += elog.c
diff --git a/src/soc/intel/common/basecode/fw_update/elog.c b/src/soc/intel/common/basecode/fw_update/elog.c
new file mode 100644
index 0000000..8daf674
--- /dev/null
+++ b/src/soc/intel/common/basecode/fw_update/elog.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <elog.h>
+#include "elog.h"
+
+int ucode_elog_event(u32 current, u32 slot, u32 staging, int status)
+{
+ const int event_type = ELOG_TYPE_INTEL_UCODE_UPDATE;
+ struct elog_event_intel_ucode event = {
+ .uc_current = current,
+ .uc_slot = slot,
+ .uc_staging = staging,
+ .status = status,
+ };
+
+ return (elog_add_event_raw(event_type, &event, sizeof(event)));
+}
+
diff --git a/src/soc/intel/common/basecode/fw_update/elog.h b/src/soc/intel/common/basecode/fw_update/elog.h
new file mode 100644
index 0000000..d56c779
--- /dev/null
+++ b/src/soc/intel/common/basecode/fw_update/elog.h
@@ -0,0 +1,22 @@
+
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+/*
+ * Add microcode update ELOG event
+ * return 0 on success, -1 on failure.
+ */
+int ucode_elog_event(u32 current, u32 slot, u32 staging, int status);
diff --git a/src/soc/intel/common/basecode/fw_update/ucode_update.c b/src/soc/intel/common/basecode/fw_update/ucode_update.c
index 4a7c194..eeb6aec 100644
--- a/src/soc/intel/common/basecode/fw_update/ucode_update.c
+++ b/src/soc/intel/common/basecode/fw_update/ucode_update.c
@@ -19,6 +19,7 @@
#include <commonlib/region.h>
#include <console/console.h>
#include <cpu/intel/microcode.h>
+#include <elog.h>
#include <fmap.h>
#include <halt.h>
#include <intelbasecode/ucode_update.h>
@@ -29,6 +30,7 @@
#include <stdlib.h>
#include <stdint.h>
#include <types.h>
+#include "elog.h"
#define locate_staging_rw(rdev) \
fmap_locate_area_as_rdev_rw(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG, \
@@ -188,7 +190,10 @@
}
printk(BIOS_INFO, "Microcode staging area updated, restart!\n");
- /* TODO: Add ELOG entry */
+
+ if (ucode_elog_event(current_ucode, slot_rev, staging_rev,
+ ELOG_INTEL_UCODE_UPDATE_PASS) < 0)
+ printk(BIOS_ERR, "Failed to log microcode update event.\n");
/* Finished writing, disable safety and reset */
configure_rtc_buc_top_swap(TS_ENABLE);
@@ -205,6 +210,8 @@
update_failed:
- /* TODO: Write Elog */
+ if (ucode_elog_event(0, 0, 0, ELOG_INTEL_UCODE_UPDATE_FAIL) < 0)
+ printk(BIOS_ERR, "Failed to log microcode update event.\n");
+
return CB_ERR;
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idda32a1073b3dc8e3f57e079b69fc415a2837899
Gerrit-Change-Number: 29357
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi at intel.com>
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