[coreboot-gerrit] Change in coreboot[master]: src: Remove unneeded whitespace before and after parenthesis
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Wed Oct 17 10:59:57 CEST 2018
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/29161 )
Change subject: src: Remove unneeded whitespace before and after parenthesis
......................................................................
Patch Set 1:
(150 comments)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c
File src/cpu/amd/family_10h-family_15h/fidvid.c:
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@173
PS1, Line 173: if (nbPState){
space required before the open brace '{'
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@178
PS1, Line 178: if (msr.hi & PS_EN_MASK) {
suspect code indent for conditional statements (32, 32)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@383
PS1, Line 383: if (AMD_CpuFindCapability(node, 0, &offset)) {
suspect code indent for conditional statements (8, 10)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@415
PS1, Line 415: for (j=0; (j<4) && (!isocEn); j++) {
spaces required around that '=' (ctx:VxV)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@415
PS1, Line 415: for (j=0; (j<4) && (!isocEn); j++) {
spaces required around that '<' (ctx:VxV)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@498
PS1, Line 498: if (cpuRev & (AMD_DA_Cx | AMD_RB_C3)) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@503
PS1, Line 503: if ((procPkg == AMD_PKGTYPE_G34) || (procPkg == AMD_PKGTYPE_C32)) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@666
PS1, Line 666: if ((((u32)0xffffffff) - initial_msr.lo) < corrected_timeout) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@675
PS1, Line 675: || ((tsc_msr.hi == timeout.hi) && (tsc_msr.lo > timeout.lo));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@676
PS1, Line 676: } while ((pstate_msr.lo != target_pstate) && (! timedout));
space prohibited after that '!' (ctx:BxW)
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@685
PS1, Line 685: } while (pstate_msr.lo != target_pstate );
space prohibited before that close parenthesis ')'
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@842
PS1, Line 842: vid_max = (reg1fc & SINGLE_PLANE_NB_VID_MASK) >> SINGLE_PLANE_NB_VID_SHIFT;
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@843
PS1, Line 843: fid_max = (reg1fc & SINGLE_PLANE_NB_FID_MASK) >> SINGLE_PLANE_NB_FID_SHIFT;
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@846
PS1, Line 846: vid_max = vid_max - ((reg1fc & DUAL_PLANE_NB_VID_OFF_MASK) >> DUAL_PLANE_NB_VID_SHIFT);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@847
PS1, Line 847: fid_max = fid_max + ((reg1fc & DUAL_PLANE_NB_FID_OFF_MASK) >> DUAL_PLANE_NB_FID_SHIFT);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/cpu/amd/family_10h-family_15h/fidvid.c@951
PS1, Line 951: if ( (msr.hi & PS_IDD_VALUE_MASK)
space prohibited after that open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/cpu/via/nano/nano_init.c
File src/cpu/via/nano/nano_init.c:
https://review.coreboot.org/#/c/29161/1/src/cpu/via/nano/nano_init.c@120
PS1, Line 120: u8 stepping = (cpuid_eax(0x1)) &0xf;
need consistent spacing around '&' (ctx:WxV)
https://review.coreboot.org/#/c/29161/1/src/cpu/via/nano/nano_init.c@125
PS1, Line 125: msr.lo |= ((1 << 25) | (1 << 26) | (1 << 31)); /* C1e, C2e, C3e */
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
File src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c@71
PS1, Line 71: if(!(sysconf.pci1234[i] & 0x1)) continue;
space required before the open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c@71
PS1, Line 71: if(!(sysconf.pci1234[i] & 0x1)) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c@108
PS1, Line 108: current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 5);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c@140
PS1, Line 140: if((sysconf.pci1234[i] & 1) != 1) continue;
space required before the open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c@140
PS1, Line 140: if((sysconf.pci1234[i] & 1) != 1) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c
File src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c@148
PS1, Line 148: if(!(sysconf.pci1234[i] & 0x1)) continue;
space required before the open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c@148
PS1, Line 148: if(!(sysconf.pci1234[i] & 0x1)) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
File src/mainboard/amd/serengeti_cheetah_fam10/mptable.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c@71
PS1, Line 71: if(!(sysconf.pci1234[i] & 0x1)) continue;
space required before the open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c@71
PS1, Line 71: if(!(sysconf.pci1234[i] & 0x1)) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c@134
PS1, Line 134: if(!(sysconf.pci1234[i] & 0x1)) continue;
space required before the open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c@134
PS1, Line 134: if(!(sysconf.pci1234[i] & 0x1)) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/torpedo/gpio.c
File src/mainboard/amd/torpedo/gpio.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/amd/torpedo/gpio.c@94
PS1, Line 94: if (BoardType == 0) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c
File src/mainboard/biostar/am1ml/romstage.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@62
PS1, Line 62: it_sio_write(dev, 0xf1 , 0x40);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@63
PS1, Line 63: it_sio_write(dev, 0xf4 , 0x80);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@64
PS1, Line 64: it_sio_write(dev, 0xf5 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@65
PS1, Line 65: it_sio_write(dev, 0xf6 , 0xf0);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@66
PS1, Line 66: it_sio_write(dev, 0xf9 , 0x48);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@67
PS1, Line 67: it_sio_write(dev, 0xfa , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@68
PS1, Line 68: it_sio_write(dev, 0xfb , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@75
PS1, Line 75: it_sio_write (dev, 0x25 , 0x80);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@75
PS1, Line 75: it_sio_write (dev, 0x25 , 0x80);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@76
PS1, Line 76: it_sio_write (dev, 0x26 , 0x07);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@76
PS1, Line 76: it_sio_write (dev, 0x26 , 0x07);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@77
PS1, Line 77: it_sio_write (dev, 0x28 , 0x81);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@77
PS1, Line 77: it_sio_write (dev, 0x28 , 0x81);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@78
PS1, Line 78: it_sio_write (dev, 0x2c , 0x06);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@78
PS1, Line 78: it_sio_write (dev, 0x2c , 0x06);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@79
PS1, Line 79: it_sio_write (dev, 0x72 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@79
PS1, Line 79: it_sio_write (dev, 0x72 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@80
PS1, Line 80: it_sio_write (dev, 0x73 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@80
PS1, Line 80: it_sio_write (dev, 0x73 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@81
PS1, Line 81: it_sio_write (dev, 0xb3 , 0x01);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@81
PS1, Line 81: it_sio_write (dev, 0xb3 , 0x01);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@82
PS1, Line 82: it_sio_write (dev, 0xb8 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@82
PS1, Line 82: it_sio_write (dev, 0xb8 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@83
PS1, Line 83: it_sio_write (dev, 0xc0 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@83
PS1, Line 83: it_sio_write (dev, 0xc0 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@84
PS1, Line 84: it_sio_write (dev, 0xc3 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@84
PS1, Line 84: it_sio_write (dev, 0xc3 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@85
PS1, Line 85: it_sio_write (dev, 0xc8 , 0x00);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@85
PS1, Line 85: it_sio_write (dev, 0xc8 , 0x00);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@86
PS1, Line 86: it_sio_write (dev, 0xc9 , 0x07);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@86
PS1, Line 86: it_sio_write (dev, 0xc9 , 0x07);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@87
PS1, Line 87: it_sio_write (dev, 0xcb , 0x01);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@87
PS1, Line 87: it_sio_write (dev, 0xcb , 0x01);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@88
PS1, Line 88: it_sio_write (dev, 0xf0 , 0x10);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@88
PS1, Line 88: it_sio_write (dev, 0xf0 , 0x10);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@89
PS1, Line 89: it_sio_write (dev, 0xf4 , 0x27);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@89
PS1, Line 89: it_sio_write (dev, 0xf4 , 0x27);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@90
PS1, Line 90: it_sio_write (dev, 0xf8 , 0x20);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@90
PS1, Line 90: it_sio_write (dev, 0xf8 , 0x20);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@91
PS1, Line 91: it_sio_write (dev, 0xf9 , 0x01);
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/biostar/am1ml/romstage.c@91
PS1, Line 91: it_sio_write (dev, 0xf9 , 0x01);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/mainboard/gizmosphere/gizmo/OemCustomize.c
File src/mainboard/gizmosphere/gizmo/OemCustomize.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/gizmosphere/gizmo/OemCustomize.c@126
PS1, Line 126: HW_RXEN_SEED(ANY_SOCKET, ANY_CHANNEL, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED),
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lenovo/t60/smihandler.c
File src/mainboard/lenovo/t60/smihandler.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/lenovo/t60/smihandler.c@52
PS1, Line 52: printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int)bar, *(bar+LVTMA_BL_MOD_LEVEL));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lenovo/z61t/smihandler.c
File src/mainboard/lenovo/z61t/smihandler.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/lenovo/z61t/smihandler.c@53
PS1, Line 53: printk(BIOS_DEBUG, "bar: %08X, level %02X\n", (unsigned int)bar,
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c
File src/mainboard/lippert/frontrunner-af/mainboard.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@68
PS1, Line 68: FCH_IOMUX(50) = 2; // GPIO50: FCH_ARST#_GATE resets stuck PCIe devices
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@69
PS1, Line 69: FCH_GPIO (50) = 0xC0; // = output set to 1 as it's never needed
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@72
PS1, Line 72: FCH_GPIO (56) = 0x28; // = inputs, disable int. pull-ups
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@74
PS1, Line 74: FCH_GPIO (57) = 0x28;
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@76
PS1, Line 76: FCH_GPIO (58) = 0x28;
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@77
PS1, Line 77: FCH_IOMUX(96) = 1; // "Gpio96": GEVENT0# signal on X2 connector (int. PU)
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/frontrunner-af/mainboard.c@78
PS1, Line 78: FCH_IOMUX(52) = 1; // GPIO52,61,62,187-192 free to use on X2 connector
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c
File src/mainboard/lippert/toucan-af/mainboard.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c@36
PS1, Line 36: FCH_IOMUX(50) = 2; // GPIO50: FCH_ARST#_GATE resets stuck PCIe devices
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c@37
PS1, Line 37: FCH_GPIO (50) = 0xC0; // = output set to 1 as it's never needed
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c@41
PS1, Line 41: FCH_GPIO (56) = 0x28; // = inputs, disable int. pull-ups
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c@43
PS1, Line 43: FCH_GPIO (57) = 0x28;
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/lippert/toucan-af/mainboard.c@45
PS1, Line 45: FCH_GPIO (58) = 0x28;
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
File src/mainboard/msi/ms9652_fam10/get_bus_conf.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/msi/ms9652_fam10/get_bus_conf.c@109
PS1, Line 109: printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu1/OemCustomize.c
File src/mainboard/pcengines/apu1/OemCustomize.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu1/OemCustomize.c@111
PS1, Line 111: HW_RXEN_SEED(ANY_SOCKET, ANY_CHANNEL, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED),
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu2/mainboard.c
File src/mainboard/pcengines/apu2/mainboard.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu2/mainboard.c@170
PS1, Line 170: pm_write16 (PM_RTC_CONTROL, pm_read16(PM_RTC_CONTROL) | (1 << 11));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu2/mainboard.c@175
PS1, Line 175: pm_write16 (PM_S_STATE_CONTROL, pm_read16(PM_S_STATE_CONTROL) | (1 << 14));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/pcengines/apu2/mainboard.c@175
PS1, Line 175: pm_write16 (PM_S_STATE_CONTROL, pm_read16(PM_S_STATE_CONTROL) | (1 << 14));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
File src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c@107
PS1, Line 107: printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
File src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c@113
PS1, Line 113: printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/mainboard/tyan/s2912_fam10/get_bus_conf.c
File src/mainboard/tyan/s2912_fam10/get_bus_conf.c:
https://review.coreboot.org/#/c/29161/1/src/mainboard/tyan/s2912_fam10/get_bus_conf.c@106
PS1, Line 106: printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/northbridge/amd/agesa/family12/dimmSpd.c
File src/northbridge/amd/agesa/family12/dimmSpd.c:
https://review.coreboot.org/#/c/29161/1/src/northbridge/amd/agesa/family12/dimmSpd.c@58
PS1, Line 58: )
please, no spaces at the start of a line
https://review.coreboot.org/#/c/29161/1/src/northbridge/amd/pi/00730F01/dimmSpd.c
File src/northbridge/amd/pi/00730F01/dimmSpd.c:
https://review.coreboot.org/#/c/29161/1/src/northbridge/amd/pi/00730F01/dimmSpd.c@37
PS1, Line 37: if (info->SocketId >= DIMENSION(config->spdAddrLookup ))
space prohibited before that close parenthesis ')'
https://review.coreboot.org/#/c/29161/1/src/northbridge/amd/pi/00730F01/dimmSpd.c@39
PS1, Line 39: if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] ))
space prohibited before that close parenthesis ')'
https://review.coreboot.org/#/c/29161/1/src/northbridge/intel/e7505/debug.c
File src/northbridge/intel/e7505/debug.c:
https://review.coreboot.org/#/c/29161/1/src/northbridge/intel/e7505/debug.c@151
PS1, Line 151: if (spd_read_byte(device, 0) < 0) continue;
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/northbridge/intel/fsp_rangeley/northbridge.c
File src/northbridge/intel/fsp_rangeley/northbridge.c:
https://review.coreboot.org/#/c/29161/1/src/northbridge/intel/fsp_rangeley/northbridge.c@134
PS1, Line 134: ram_resource(dev, index++, 0x100000000 >> 10, (bmbound_hi - 0x100000000) >> 10);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c
File src/soc/broadcom/cygnus/ddr_init.c:
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@74
PS1, Line 74: reg32_write ((volatile uint32_t *)DDR_PHY_CONTROL_REGS_STATIC_PAD_CTL, (readvalue & ~(1 << DDR_PHY_CONTROL_REGS_STATIC_PAD_CTL__RX_MODE_R)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@74
PS1, Line 74: reg32_write ((volatile uint32_t *)DDR_PHY_CONTROL_REGS_STATIC_PAD_CTL, (readvalue & ~(1 << DDR_PHY_CONTROL_REGS_STATIC_PAD_CTL__RX_MODE_R)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@78
PS1, Line 78: reg32_write ((volatile uint32_t *)DDR_PHY_CONTROL_REGS_ZQ_CAL, (readvalue & ~(1 << DDR_PHY_CONTROL_REGS_ZQ_CAL__ZQ_IDDQ)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@78
PS1, Line 78: reg32_write ((volatile uint32_t *)DDR_PHY_CONTROL_REGS_ZQ_CAL, (readvalue & ~(1 << DDR_PHY_CONTROL_REGS_ZQ_CAL__ZQ_IDDQ)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@82
PS1, Line 82: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL__IDLE)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@82
PS1, Line 82: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL__IDLE)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@85
PS1, Line 85: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & 0xffff800f));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@85
PS1, Line 85: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & 0xffff800f));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@88
PS1, Line 88: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL__IDDQ)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@88
PS1, Line 88: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_0_IDLE_PAD_CONTROL__IDDQ)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@92
PS1, Line 92: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDLE)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@92
PS1, Line 92: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDLE)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@95
PS1, Line 95: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & 0xffff800f));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@95
PS1, Line 95: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & 0xffff800f));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@98
PS1, Line 98: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDDQ)));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@98
PS1, Line 98: reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, (readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDDQ)));
space prohibited between function name and open parenthesis '('
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@146
PS1, Line 146: #define SET_OVR_STEP(v) (0x30000 | ((v) & 0x3F)) /* OVR_FORCE = OVR_EN = 1, OVR_STEP = v */
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@449
PS1, Line 449: reg32_clear_bits((volatile uint32_t *)DDR_DENALI_CTL_89 , 1 << 18);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@452
PS1, Line 452: reg32_write((volatile uint32_t *)DDR_DENALI_CTL_43 , (1 << 17) | (1 << 24) | (1 << 25));
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@452
PS1, Line 452: reg32_write((volatile uint32_t *)DDR_DENALI_CTL_43 , (1 << 17) | (1 << 24) | (1 << 25));
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@455
PS1, Line 455: reg32_set_bits((volatile uint32_t *)DDR_DENALI_CTL_43 , 1 << 25);
space prohibited before that ',' (ctx:WxW)
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@458
PS1, Line 458: if (reg32_read((volatile uint32_t *)DDR_DENALI_CTL_89) & (1 << 18)) {
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@458
PS1, Line 458: if (reg32_read((volatile uint32_t *)DDR_DENALI_CTL_89) & (1 << 18)) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@464
PS1, Line 464: if (j == 0 && (reg32_read((volatile uint32_t *)DDR_DENALI_CTL_89) & (1 << 18)) == 0) {
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@968
PS1, Line 968: if ((((uint32_t)reg >= DDR_PHY_WORD_LANE_0_VDL_OVRIDE_BYTE_RD_EN) && ((uint32_t)reg <= (DDR_PHY_WORD_LANE_0_VDL_OVRIDE_BYTE_RD_EN + 0x114)))
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@986
PS1, Line 986: if (CONFIG_SHMOO_REUSE_MEMTEST_LENGTH > 0) {
please, no spaces at the start of a line
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@1121
PS1, Line 1121: for (i = 0; i < 1000; i++);
please, no spaces at the start of a line
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@1121
PS1, Line 1121: for (i = 0; i < 1000; i++);
trailing statements should be on next line
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/ddr_init.c@1380
PS1, Line 1380: if (val != 0) {
suspect code indent for conditional statements (16, 12)
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/phy_reg_access.c
File src/soc/broadcom/cygnus/phy_reg_access.c:
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/phy_reg_access.c@20
PS1, Line 20: data = (* (volatile uint32 *) (((uint32)GLOBAL_REG_RBUS_START) | (address)));
please, no spaces at the start of a line
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/phy_reg_access.c@27
PS1, Line 27: ((* (volatile uint32 *) (((uint32)GLOBAL_REG_RBUS_START) | (address))) = data);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/broadcom/cygnus/phy_reg_access.c@27
PS1, Line 27: ((* (volatile uint32 *) (((uint32)GLOBAL_REG_RBUS_START) | (address))) = data);
please, no spaces at the start of a line
https://review.coreboot.org/#/c/29161/1/src/soc/intel/baytrail/perf_power.c
File src/soc/intel/baytrail/perf_power.c:
https://review.coreboot.org/#/c/29161/1/src/soc/intel/baytrail/perf_power.c@224
PS1, Line 224: E(CCU, 0x1c, MASK_VAL(1, 0, 0x0)), //vlv.ccu.clkgate_en_1.lps_free_clkgate_en
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
File src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c:
https://review.coreboot.org/#/c/29161/1/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c@325
PS1, Line 325: printk(BIOS_WARNING,"Rebooting..\n");
space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/29161/1/src/soc/intel/fsp_baytrail/northcluster.c
File src/soc/intel/fsp_baytrail/northcluster.c:
https://review.coreboot.org/#/c/29161/1/src/soc/intel/fsp_baytrail/northcluster.c@161
PS1, Line 161: ram_resource(dev, index++, 0x100000000 >> 10, highmem_size >> 10);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/amd8132/bridge.c
File src/southbridge/amd/amd8132/bridge.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/amd8132/bridge.c@388
PS1, Line 388: if ((chip_rev == 0x11) ||(chip_rev == 0x12)) {
spaces required around that '||' (ctx:WxV)
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c
File src/southbridge/amd/cimx/sb800/fan.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@234
PS1, Line 234: sb_config.Pecstruct.MSGFun89zone0MSGREG2 = (sb_chip->imc_tempin0_at & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@238
PS1, Line 238: sb_config.Pecstruct.MSGFun89zone0MSGREG6 = (sb_chip->imc_tempin0_ct & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@252
PS1, Line 252: sb_config.Pecstruct.MSGFun89zone1MSGREG2 = (sb_chip->imc_tempin1_at & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@256
PS1, Line 256: sb_config.Pecstruct.MSGFun89zone1MSGREG6 = (sb_chip->imc_tempin1_ct & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@270
PS1, Line 270: sb_config.Pecstruct.MSGFun89zone2MSGREG2 = (sb_chip->imc_tempin2_at & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@274
PS1, Line 274: sb_config.Pecstruct.MSGFun89zone2MSGREG6 = (sb_chip->imc_tempin2_ct & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@288
PS1, Line 288: sb_config.Pecstruct.MSGFun89zone3MSGREG2 = (sb_chip->imc_tempin3_at & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/cimx/sb800/fan.c@292
PS1, Line 292: sb_config.Pecstruct.MSGFun89zone3MSGREG6 = (sb_chip->imc_tempin3_ct & 0xff);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/rs780/gfx.c
File src/southbridge/amd/rs780/gfx.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/rs780/gfx.c@250
PS1, Line 250: if (Attribute & MMIO_ATTRIB_NP_ONLY && pMMIO[k].Attribute == 0) {
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/rs780/gfx.c@250
PS1, Line 250: if (Attribute & MMIO_ATTRIB_NP_ONLY && pMMIO[k].Attribute == 0) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/sb700/sata.c
File src/southbridge/amd/sb700/sata.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/sb700/sata.c@473
PS1, Line 473: (i % 2) ? "Slave" : "Master", i);
line over 80 characters
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/sr5650/pcie.c
File src/southbridge/amd/sr5650/pcie.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/amd/sr5650/pcie.c@809
PS1, Line 809: if (!((pci_read_config32(dev, 0x6C) >> 6) & 0x01)) {
braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/29161/1/src/southbridge/ricoh/rl5c476/rl5c476.c
File src/southbridge/ricoh/rl5c476/rl5c476.c:
https://review.coreboot.org/#/c/29161/1/src/southbridge/ricoh/rl5c476/rl5c476.c@169
PS1, Line 169: if (enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
space required before the open brace '{'
https://review.coreboot.org/#/c/29161/1/src/southbridge/ricoh/rl5c476/rl5c476.c@184
PS1, Line 184: if (enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
space required before the open brace '{'
https://review.coreboot.org/#/c/29161/1/src/southbridge/ricoh/rl5c476/rl5c476.c@186
PS1, Line 186: if (!(resource->flags & IORESOURCE_STORED)){
space required before the open brace '{'
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Gerrit-Change-Number: 29161
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-CC: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Wed, 17 Oct 2018 08:59:57 +0000
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