[coreboot-gerrit] Change in coreboot[master]: mb/lenovo/t60: Fix typo in ACPI C-state

[Peter Lemenkov (Code Review)]

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/29160


Change subject: mb/lenovo/t60: Fix typo in ACPI C-state
......................................................................

mb/lenovo/t60: Fix typo in ACPI C-state

We have 3 similar Lenovo mainboards - x60 (oldest), t60, and z61t (most
recent addition).  Their ACPI C-state tables were reworked with commit
4cc8c70c (Change-Id Icb87418d44d355f607c4a67300107b40f40b3b3f) to
something like that:

static acpi_cstate_t cst_entries[] = {
       { 1,  1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
       { 2,  1,  500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
       { 2, 17,  250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};

where acpi_cstate_t is defined as follows:

typedef struct acpi_cstate {
        u8  ctype;
        u16 latency;
        u32 power;
        acpi_addr_t resource;
} __packed acpi_cstate_t;

Please, note two consequent 2s as ctype values.

Later this was corrected for x60 mainboard in commit e1f0ac4b (Change-Id
I9eeb5b008e2ddc2193725667f2c13582a4877e3c). Since then the last line
starts from 3 as ctype value.

And z61t was introduced with 3 as the last CST entry's ctype - see
commit 60d9ce39 (Change-Id I84c89cc47d3db126d827f92d50270954bc42f224).

For me it looks like typo, but I am not sure here. Could someone please
clarify whether t60 should have the ACPI C-state table listed above or
the following one (as two other boards have):

static acpi_cstate_t cst_entries[] = {
       { 1,  1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
       { 2,  1,  500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
       { 3, 17,  250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};

Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Signed-off-by: Peter Lemenkov <lemenkov at gmail.com>
---
M src/mainboard/lenovo/t60/mainboard.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/29160/1

diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index bb52c87..5a565e0 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -29,7 +29,7 @@
 static acpi_cstate_t cst_entries[] = {
 	{ 1,  1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
 	{ 2,  1,  500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
-	{ 2, 17,  250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
+	{ 3, 17,  250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
 };
 
 int get_cst_entries(acpi_cstate_t **entries)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Gerrit-Change-Number: 29160
Gerrit-PatchSet: 1
Gerrit-Owner: Peter Lemenkov <lemenkov at gmail.com>
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