[coreboot-gerrit] Change in coreboot[master]: sb/intel/i82801jx: Use macros for LPC_EN
Felix Held (Code Review)
gerrit at coreboot.org
Mon Oct 15 14:51:22 CEST 2018
Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/29100 )
Change subject: sb/intel/i82801jx: Use macros for LPC_EN
......................................................................
sb/intel/i82801jx: Use macros for LPC_EN
Change-Id: I4a9a9366c85206fa460519a26f48b3aada5bc7c3
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
Reviewed-on: https://review.coreboot.org/29100
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Felix Held <felix-coreboot at felixheld.de>
---
M src/mainboard/intel/dg43gt/romstage.c
M src/southbridge/intel/i82801jx/i82801jx.h
2 files changed, 14 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c
index 64b462f..36aa149 100644
--- a/src/mainboard/intel/dg43gt/romstage.c
+++ b/src/mainboard/intel/dg43gt/romstage.c
@@ -60,7 +60,10 @@
{
/* Configure serial IRQs.*/
pci_write_config16(LPC_DEV, D31F0_LPC_IODEC, 0x0010);
- pci_write_config16(LPC_DEV, D31F0_LPC_EN, 0x3f0f);
+ pci_write_config16(LPC_DEV, D31F0_LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN
+ | MC_LPC_EN | KBC_LPC_EN | GAMEH_LPC_EN
+ | GAMEL_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
+ | COMB_LPC_EN | COMA_LPC_EN);
pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0xfc0601);
pci_write_config32(LPC_DEV, D31F0_GEN2_DEC, 0xfc0291);
pci_write_config32(LPC_DEV, D31F0_GEN3_DEC, 0);
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 2e2d719..3c09746 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -99,6 +99,16 @@
#define D31F0_PIRQH_ROUT 0x6b
#define D31F0_LPC_IODEC 0x80
#define D31F0_LPC_EN 0x82
+#define CNF2_LPC_EN (1 << 13) /* 0x4e/0x4f */
+#define CNF1_LPC_EN (1 << 12) /* 0x2e/0x2f */
+#define MC_LPC_EN (1 << 11) /* 0x62/0x66 */
+#define KBC_LPC_EN (1 << 10) /* 0x60/0x64 */
+#define GAMEH_LPC_EN (1 << 9) /* 0x208/0x20f */
+#define GAMEL_LPC_EN (1 << 8) /* 0x200/0x207 */
+#define FDD_LPC_EN (1 << 3) /* LPC_IO_DEC[12] */
+#define LPT_LPC_EN (1 << 2) /* LPC_IO_DEC[9:8] */
+#define COMB_LPC_EN (1 << 1) /* LPC_IO_DEC[6:4] */
+#define COMA_LPC_EN (1 << 0) /* LPC_IO_DEC[2:0] */
#define D31F0_GEN1_DEC 0x84
#define D31F0_GEN2_DEC 0x88
#define D31F0_GEN3_DEC 0x8c
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I4a9a9366c85206fa460519a26f48b3aada5bc7c3
Gerrit-Change-Number: 29100
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot at felixheld.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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