[coreboot-gerrit] Change in coreboot[master]: src/drivers/intel: Add coffee lake FSP CAR support

[PraveenX Hodagatta Pranesh (Code Review)]

PraveenX Hodagatta Pranesh has uploaded this change for review. ( https://review.coreboot.org/28985


Change subject: src/drivers/intel: Add coffee lake FSP CAR support
......................................................................

src/drivers/intel: Add coffee lake FSP CAR support

CPU_MICROCODE_CBFS_LEN and CPU_MICROCODE_CBFS_LOC configs passes the CPU
microcode length and base address in CBFS to FSPT binary as init parameters.

Add new config FSP_T_XIP in Kconfig, which is selected by platform config.
If FSP_T_XIP is selected, then relocate FSPT binary while adding it in CBFS
so that it can be executed in place.

BUG= None
TEST= Build for both CFL RVP11 & RVP8 and verified for successfull CAR setup.

Change-Id: Ic46e0bb9ee13c38ff322979119c4813653c61029
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh at intel.com>
---
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/Makefile.inc
2 files changed, 24 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/28985/1

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 4c4dfb2..31556ee 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -53,6 +53,20 @@
 	  Display the user specified product data prior to memory
 	  initialization.
 
+config CPU_MICROCODE_CBFS_LEN
+	hex "Microcode update region length in bytes"
+	depends on FSP_CAR
+	default 0x0
+	help
+	  The length in bytes of the microcode update region.
+
+config CPU_MICROCODE_CBFS_LOC
+	hex "Microcode update base address in CBFS"
+	depends on FSP_CAR
+	default 0x0
+	help
+	  The location (base address) in CBFS that contains the microcode update binary.
+
 config FSP_T_CBFS
 	string "Name of FSP-T in CBFS"
 	depends on FSP_CAR
@@ -97,6 +111,13 @@
 	help
 	  Select this value when FSP-M is execute-in-place.
 
+config FSP_T_XIP
+	bool "Is FSP-T XIP"
+	depends on FSP_CAR
+	default n
+	help
+	  Select this value when FSP-T is execute-in-place.
+
 config FSP_USES_CB_STACK
 	bool
 	default n
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index d5709ad..68200b0 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -52,6 +52,9 @@
 cbfs-files-$(CONFIG_FSP_CAR) += $(CONFIG_FSP_T_CBFS)
 $(CONFIG_FSP_T_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_T_FILE))
 $(CONFIG_FSP_T_CBFS)-type := fsp
+ifeq ($(CONFIG_FSP_T_XIP),y)
+$(CONFIG_FSP_T_CBFS)-options := --xip
+endif
 
 cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(CONFIG_FSP_M_CBFS)
 $(CONFIG_FSP_M_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE))

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic46e0bb9ee13c38ff322979119c4813653c61029
Gerrit-Change-Number: 28985
Gerrit-PatchSet: 1
Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh at intel.com>
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