[coreboot-gerrit] Change in coreboot[master]: WIP: riscv: drop .data/.bss from bootblock

Philipp Hug (Code Review) gerrit at coreboot.org
Tue Oct 9 15:02:00 CEST 2018


Philipp Hug has uploaded this change for review. ( https://review.coreboot.org/28977


Change subject: WIP: riscv: drop .data/.bss from bootblock
......................................................................

WIP: riscv: drop .data/.bss from bootblock

bootblock on RISC-V doesn't need a data and bss segment.
This makes it easier to execute the bootblock directly from boot media.

TODO: How can me make the linker complain if data segment is still present?

Change-Id: I61f9610ed11379e42b6696beffef6e4ca2e72dbd
Signed-off-by: Philipp Hug <philipp at hug.cx>
---
M src/arch/riscv/include/arch/memlayout.h
M src/arch/riscv/misaligned.c
M src/soc/sifive/fu540/media.c
3 files changed, 12 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/28977/1

diff --git a/src/arch/riscv/include/arch/memlayout.h b/src/arch/riscv/include/arch/memlayout.h
index 7baab76..99e96e0 100644
--- a/src/arch/riscv/include/arch/memlayout.h
+++ b/src/arch/riscv/include/arch/memlayout.h
@@ -18,6 +18,14 @@
 #ifndef __ARCH_MEMLAYOUT_H
 #define __ARCH_MEMLAYOUT_H
 
+#if ENV_BOOTBLOCK
+/*
+ * No .data or .bss sections in the bootblock
+ */
+#define ARCH_STAGE_HAS_DATA_SECTION 0
+#define ARCH_STAGE_HAS_BSS_SECTION 0
+#endif
+
 #define STACK(addr, size) REGION(stack, addr, size, 4096)
 
 #if defined(__PRE_RAM__)
diff --git a/src/arch/riscv/misaligned.c b/src/arch/riscv/misaligned.c
index ba96102..a91c4dd 100644
--- a/src/arch/riscv/misaligned.c
+++ b/src/arch/riscv/misaligned.c
@@ -57,7 +57,7 @@
 	unsigned int sign_extend : 1; /* mark need to be sign extended */
 };
 
-static struct memory_instruction_info insn_info[] = {
+static const struct memory_instruction_info insn_info[] = {
 #if __riscv_xlen == 128
 	{ 0x00002000, 0x0000e003,  2,  7, 8, 0, 1, 16, 1}, // C.LQ
 #else
@@ -136,7 +136,7 @@
 #endif // defined(__riscv_flen)
 };
 
-static struct memory_instruction_info *match_instruction(uintptr_t insn)
+static const struct memory_instruction_info *match_instruction(const uintptr_t insn)
 {
 	int i;
 	for (i = 0; i < ARRAY_SIZE(insn_info); i++)
@@ -187,7 +187,7 @@
 	}
 
 	/* matching instruction */
-	struct memory_instruction_info *match = match_instruction(insn);
+	const struct memory_instruction_info *match = match_instruction(insn);
 
 	if (!match) {
 		redirect_trap();
diff --git a/src/soc/sifive/fu540/media.c b/src/soc/sifive/fu540/media.c
index 7b9ccb0..754f956 100644
--- a/src/soc/sifive/fu540/media.c
+++ b/src/soc/sifive/fu540/media.c
@@ -16,7 +16,7 @@
 #include <boot_device.h>
 
 /* At 0x20000000: A 256MiB long memory-mapped view of the flash at QSPI0 */
-static struct mem_region_device mdev =
+static const struct mem_region_device mdev =
 	MEM_REGION_DEV_RO_INIT((void *)0x20000000, CONFIG_ROM_SIZE);
 
 const struct region_device *boot_device_ro(void)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I61f9610ed11379e42b6696beffef6e4ca2e72dbd
Gerrit-Change-Number: 28977
Gerrit-PatchSet: 1
Gerrit-Owner: Philipp Hug <philipp at hug.cx>
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